61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 1) /*
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 2) * Sonics Silicon Backplane
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 3) * Broadcom MIPS core driver
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 4) *
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 5) * Copyright 2005, Broadcom Corporation
eb032b9837a95 (Michael Buesch 2011-07-04 20:50:05 +0200 6) * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 7) *
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 8) * Licensed under the GNU/GPL. See COPYING for details.
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 9) */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 10)
b8b6069cf2087 (Michael Buesch 2018-07-31 21:56:38 +0200 11) #include "ssb_private.h"
b8b6069cf2087 (Michael Buesch 2018-07-31 21:56:38 +0200 12)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 13) #include <linux/ssb/ssb.h>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 14)
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 15) #include <linux/mtd/physmap.h>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 16) #include <linux/serial.h>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 17) #include <linux/serial_core.h>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 18) #include <linux/serial_reg.h>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 19) #include <linux/time.h>
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 20) #ifdef CONFIG_BCM47XX
138173d4e8265 (Rafał Miłecki 2014-12-01 07:58:18 +0100 21) #include <linux/bcm47xx_nvram.h>
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 22) #endif
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 23)
255e9fd4b1000 (Artem Bityutskiy 2013-03-12 10:37:29 +0200 24) static const char * const part_probes[] = { "bcm47xxpart", NULL };
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 25)
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 26) static struct physmap_flash_data ssb_pflash_data = {
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 27) .part_probe_types = part_probes,
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 28) };
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 29)
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 30) static struct resource ssb_pflash_resource = {
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 31) .name = "ssb_pflash",
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 32) .flags = IORESOURCE_MEM,
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 33) };
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 34)
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 35) struct platform_device ssb_pflash_dev = {
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 36) .name = "physmap-flash",
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 37) .dev = {
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 38) .platform_data = &ssb_pflash_data,
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 39) },
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 40) .resource = &ssb_pflash_resource,
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 41) .num_resources = 1,
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 42) };
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 43)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 44) static inline u32 mips_read32(struct ssb_mipscore *mcore,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 45) u16 offset)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 46) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 47) return ssb_read32(mcore->dev, offset);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 48) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 49)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 50) static inline void mips_write32(struct ssb_mipscore *mcore,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 51) u16 offset,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 52) u32 value)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 53) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 54) ssb_write32(mcore->dev, offset, value);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 55) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 56)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 57) static const u32 ipsflag_irq_mask[] = {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 58) 0,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 59) SSB_IPSFLAG_IRQ1,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 60) SSB_IPSFLAG_IRQ2,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 61) SSB_IPSFLAG_IRQ3,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 62) SSB_IPSFLAG_IRQ4,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 63) };
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 64)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 65) static const u32 ipsflag_irq_shift[] = {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 66) 0,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 67) SSB_IPSFLAG_IRQ1_SHIFT,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 68) SSB_IPSFLAG_IRQ2_SHIFT,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 69) SSB_IPSFLAG_IRQ3_SHIFT,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 70) SSB_IPSFLAG_IRQ4_SHIFT,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 71) };
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 72)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 73) static inline u32 ssb_irqflag(struct ssb_device *dev)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 74) {
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 75) u32 tpsflag = ssb_read32(dev, SSB_TPSFLAG);
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 76) if (tpsflag)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 77) return ssb_read32(dev, SSB_TPSFLAG) & SSB_TPSFLAG_BPFLAG;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 78) else
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 79) /* not irq supported */
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 80) return 0x3f;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 81) }
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 82)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 83) static struct ssb_device *find_device(struct ssb_device *rdev, int irqflag)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 84) {
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 85) struct ssb_bus *bus = rdev->bus;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 86) int i;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 87) for (i = 0; i < bus->nr_devices; i++) {
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 88) struct ssb_device *dev;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 89) dev = &(bus->devices[i]);
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 90) if (ssb_irqflag(dev) == irqflag)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 91) return dev;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 92) }
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 93) return NULL;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 94) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 95)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 96) /* Get the MIPS IRQ assignment for a specified device.
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 97) * If unassigned, 0 is returned.
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 98) * If disabled, 5 is returned.
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 99) * If not supported, 6 is returned.
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 100) */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 101) unsigned int ssb_mips_irq(struct ssb_device *dev)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 102) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 103) struct ssb_bus *bus = dev->bus;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 104) struct ssb_device *mdev = bus->mipscore.dev;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 105) u32 irqflag;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 106) u32 ipsflag;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 107) u32 tmp;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 108) unsigned int irq;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 109)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 110) irqflag = ssb_irqflag(dev);
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 111) if (irqflag == 0x3f)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 112) return 6;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 113) ipsflag = ssb_read32(bus->mipscore.dev, SSB_IPSFLAG);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 114) for (irq = 1; irq <= 4; irq++) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 115) tmp = ((ipsflag & ipsflag_irq_mask[irq]) >> ipsflag_irq_shift[irq]);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 116) if (tmp == irqflag)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 117) break;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 118) }
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 119) if (irq == 5) {
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 120) if ((1 << irqflag) & ssb_read32(mdev, SSB_INTVEC))
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 121) irq = 0;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 122) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 123)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 124) return irq;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 125) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 126)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 127) static void clear_irq(struct ssb_bus *bus, unsigned int irq)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 128) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 129) struct ssb_device *dev = bus->mipscore.dev;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 130)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 131) /* Clear the IRQ in the MIPScore backplane registers */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 132) if (irq == 0) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 133) ssb_write32(dev, SSB_INTVEC, 0);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 134) } else {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 135) ssb_write32(dev, SSB_IPSFLAG,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 136) ssb_read32(dev, SSB_IPSFLAG) |
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 137) ipsflag_irq_mask[irq]);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 138) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 139) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 140)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 141) static void set_irq(struct ssb_device *dev, unsigned int irq)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 142) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 143) unsigned int oldirq = ssb_mips_irq(dev);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 144) struct ssb_bus *bus = dev->bus;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 145) struct ssb_device *mdev = bus->mipscore.dev;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 146) u32 irqflag = ssb_irqflag(dev);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 147)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 148) BUG_ON(oldirq == 6);
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 149)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 150) dev->irq = irq + 2;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 151)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 152) /* clear the old irq */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 153) if (oldirq == 0)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 154) ssb_write32(mdev, SSB_INTVEC, (~(1 << irqflag) & ssb_read32(mdev, SSB_INTVEC)));
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 155) else if (oldirq != 5)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 156) clear_irq(bus, oldirq);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 157)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 158) /* assign the new one */
2633da237ba29 (Michael Buesch 2008-04-08 11:17:29 +0200 159) if (irq == 0) {
2633da237ba29 (Michael Buesch 2008-04-08 11:17:29 +0200 160) ssb_write32(mdev, SSB_INTVEC, ((1 << irqflag) | ssb_read32(mdev, SSB_INTVEC)));
2633da237ba29 (Michael Buesch 2008-04-08 11:17:29 +0200 161) } else {
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 162) u32 ipsflag = ssb_read32(mdev, SSB_IPSFLAG);
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 163) if ((ipsflag & ipsflag_irq_mask[irq]) != ipsflag_irq_mask[irq]) {
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 164) u32 oldipsflag = (ipsflag & ipsflag_irq_mask[irq]) >> ipsflag_irq_shift[irq];
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 165) struct ssb_device *olddev = find_device(dev, oldipsflag);
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 166) if (olddev)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 167) set_irq(olddev, 0);
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 168) }
2633da237ba29 (Michael Buesch 2008-04-08 11:17:29 +0200 169) irqflag <<= ipsflag_irq_shift[irq];
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 170) irqflag |= (ipsflag & ~ipsflag_irq_mask[irq]);
2633da237ba29 (Michael Buesch 2008-04-08 11:17:29 +0200 171) ssb_write32(mdev, SSB_IPSFLAG, irqflag);
2633da237ba29 (Michael Buesch 2008-04-08 11:17:29 +0200 172) }
b8b6069cf2087 (Michael Buesch 2018-07-31 21:56:38 +0200 173) dev_dbg(dev->dev, "set_irq: core 0x%04x, irq %d => %d\n",
33a606ac8020b (Joe Perches 2013-02-20 12:16:13 -0800 174) dev->id.coreid, oldirq+2, irq+2);
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 175) }
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 176)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 177) static void print_irq(struct ssb_device *dev, unsigned int irq)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 178) {
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 179) static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
b8b6069cf2087 (Michael Buesch 2018-07-31 21:56:38 +0200 180) dev_dbg(dev->dev,
b8b6069cf2087 (Michael Buesch 2018-07-31 21:56:38 +0200 181) "core 0x%04x, irq : %s%s %s%s %s%s %s%s %s%s %s%s %s%s\n",
33a606ac8020b (Joe Perches 2013-02-20 12:16:13 -0800 182) dev->id.coreid,
33a606ac8020b (Joe Perches 2013-02-20 12:16:13 -0800 183) irq_name[0], irq == 0 ? "*" : " ",
33a606ac8020b (Joe Perches 2013-02-20 12:16:13 -0800 184) irq_name[1], irq == 1 ? "*" : " ",
33a606ac8020b (Joe Perches 2013-02-20 12:16:13 -0800 185) irq_name[2], irq == 2 ? "*" : " ",
33a606ac8020b (Joe Perches 2013-02-20 12:16:13 -0800 186) irq_name[3], irq == 3 ? "*" : " ",
33a606ac8020b (Joe Perches 2013-02-20 12:16:13 -0800 187) irq_name[4], irq == 4 ? "*" : " ",
33a606ac8020b (Joe Perches 2013-02-20 12:16:13 -0800 188) irq_name[5], irq == 5 ? "*" : " ",
33a606ac8020b (Joe Perches 2013-02-20 12:16:13 -0800 189) irq_name[6], irq == 6 ? "*" : " ");
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 190) }
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 191)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 192) static void dump_irq(struct ssb_bus *bus)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 193) {
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 194) int i;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 195) for (i = 0; i < bus->nr_devices; i++) {
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 196) struct ssb_device *dev;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 197) dev = &(bus->devices[i]);
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 198) print_irq(dev, ssb_mips_irq(dev));
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 199) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 200) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 201)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 202) static void ssb_mips_serial_init(struct ssb_mipscore *mcore)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 203) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 204) struct ssb_bus *bus = mcore->dev->bus;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 205)
0362063b7be97 (Hauke Mehrtens 2012-11-27 00:31:55 +0100 206) if (ssb_extif_available(&bus->extif))
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 207) mcore->nr_serial_ports = ssb_extif_serial_init(&bus->extif, mcore->serial_ports);
0362063b7be97 (Hauke Mehrtens 2012-11-27 00:31:55 +0100 208) else if (ssb_chipco_available(&bus->chipco))
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 209) mcore->nr_serial_ports = ssb_chipco_serial_init(&bus->chipco, mcore->serial_ports);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 210) else
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 211) mcore->nr_serial_ports = 0;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 212) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 213)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 214) static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 215) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 216) struct ssb_bus *bus = mcore->dev->bus;
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 217) struct ssb_sflash *sflash = &mcore->sflash;
f1ab57e3a1141 (Rafał Miłecki 2013-01-25 11:36:25 +0100 218) struct ssb_pflash *pflash = &mcore->pflash;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 219)
902d9e0f48ddc (Rafał Miłecki 2012-08-08 19:37:04 +0200 220) /* When there is no chipcommon on the bus there is 4MB flash */
0362063b7be97 (Hauke Mehrtens 2012-11-27 00:31:55 +0100 221) if (!ssb_chipco_available(&bus->chipco)) {
f1ab57e3a1141 (Rafał Miłecki 2013-01-25 11:36:25 +0100 222) pflash->present = true;
f1ab57e3a1141 (Rafał Miłecki 2013-01-25 11:36:25 +0100 223) pflash->buswidth = 2;
f1ab57e3a1141 (Rafał Miłecki 2013-01-25 11:36:25 +0100 224) pflash->window = SSB_FLASH1;
f1ab57e3a1141 (Rafał Miłecki 2013-01-25 11:36:25 +0100 225) pflash->window_size = SSB_FLASH1_SZ;
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 226) goto ssb_pflash;
902d9e0f48ddc (Rafał Miłecki 2012-08-08 19:37:04 +0200 227) }
902d9e0f48ddc (Rafał Miłecki 2012-08-08 19:37:04 +0200 228)
902d9e0f48ddc (Rafał Miłecki 2012-08-08 19:37:04 +0200 229) /* There is ChipCommon, so use it to read info about flash */
902d9e0f48ddc (Rafał Miłecki 2012-08-08 19:37:04 +0200 230) switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
902d9e0f48ddc (Rafał Miłecki 2012-08-08 19:37:04 +0200 231) case SSB_CHIPCO_FLASHT_STSER:
902d9e0f48ddc (Rafał Miłecki 2012-08-08 19:37:04 +0200 232) case SSB_CHIPCO_FLASHT_ATSER:
b8b6069cf2087 (Michael Buesch 2018-07-31 21:56:38 +0200 233) dev_dbg(mcore->dev->dev, "Found serial flash\n");
72a525cbb8037 (Rafał Miłecki 2013-01-06 21:48:50 +0100 234) ssb_sflash_init(&bus->chipco);
902d9e0f48ddc (Rafał Miłecki 2012-08-08 19:37:04 +0200 235) break;
902d9e0f48ddc (Rafał Miłecki 2012-08-08 19:37:04 +0200 236) case SSB_CHIPCO_FLASHT_PARA:
b8b6069cf2087 (Michael Buesch 2018-07-31 21:56:38 +0200 237) dev_dbg(mcore->dev->dev, "Found parallel flash\n");
f1ab57e3a1141 (Rafał Miłecki 2013-01-25 11:36:25 +0100 238) pflash->present = true;
f1ab57e3a1141 (Rafał Miłecki 2013-01-25 11:36:25 +0100 239) pflash->window = SSB_FLASH2;
f1ab57e3a1141 (Rafał Miłecki 2013-01-25 11:36:25 +0100 240) pflash->window_size = SSB_FLASH2_SZ;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 241) if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 242) & SSB_CHIPCO_CFG_DS16) == 0)
f1ab57e3a1141 (Rafał Miłecki 2013-01-25 11:36:25 +0100 243) pflash->buswidth = 1;
902d9e0f48ddc (Rafał Miłecki 2012-08-08 19:37:04 +0200 244) else
f1ab57e3a1141 (Rafał Miłecki 2013-01-25 11:36:25 +0100 245) pflash->buswidth = 2;
902d9e0f48ddc (Rafał Miłecki 2012-08-08 19:37:04 +0200 246) break;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 247) }
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 248)
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 249) ssb_pflash:
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 250) if (sflash->present) {
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 251) #ifdef CONFIG_BCM47XX
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 252) bcm47xx_nvram_init_from_mem(sflash->window, sflash->size);
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 253) #endif
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 254) } else if (pflash->present) {
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 255) #ifdef CONFIG_BCM47XX
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 256) bcm47xx_nvram_init_from_mem(pflash->window, pflash->window_size);
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 257) #endif
21400f252a977 (Rafał Miłecki 2014-09-03 22:59:45 +0200 258)
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 259) ssb_pflash_data.width = pflash->buswidth;
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 260) ssb_pflash_resource.start = pflash->window;
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 261) ssb_pflash_resource.end = pflash->window + pflash->window_size;
c7a4a9e3880cc (Rafał Miłecki 2013-01-25 11:36:26 +0100 262) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 263) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 264)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 265) u32 ssb_cpu_clock(struct ssb_mipscore *mcore)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 266) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 267) struct ssb_bus *bus = mcore->dev->bus;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 268) u32 pll_type, n, m, rate = 0;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 269)
d486a5b4996d2 (Hauke Mehrtens 2012-02-01 00:13:56 +0100 270) if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU)
d486a5b4996d2 (Hauke Mehrtens 2012-02-01 00:13:56 +0100 271) return ssb_pmu_get_cpu_clock(&bus->chipco);
d486a5b4996d2 (Hauke Mehrtens 2012-02-01 00:13:56 +0100 272)
0362063b7be97 (Hauke Mehrtens 2012-11-27 00:31:55 +0100 273) if (ssb_extif_available(&bus->extif)) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 274) ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m);
0362063b7be97 (Hauke Mehrtens 2012-11-27 00:31:55 +0100 275) } else if (ssb_chipco_available(&bus->chipco)) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 276) ssb_chipco_get_clockcpu(&bus->chipco, &pll_type, &n, &m);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 277) } else
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 278) return 0;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 279)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 280) if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 281) rate = 200000000;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 282) } else {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 283) rate = ssb_calc_clock_rate(pll_type, n, m);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 284) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 285)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 286) if (pll_type == SSB_PLLTYPE_6) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 287) rate *= 2;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 288) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 289)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 290) return rate;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 291) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 292)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 293) void ssb_mipscore_init(struct ssb_mipscore *mcore)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 294) {
7007d00caca26 (Felix Fietkau 2007-10-14 21:04:22 +0200 295) struct ssb_bus *bus;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 296) struct ssb_device *dev;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 297) unsigned long hz, ns;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 298) unsigned int irq, i;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 299)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 300) if (!mcore->dev)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 301) return; /* We don't have a MIPS core */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 302)
b8b6069cf2087 (Michael Buesch 2018-07-31 21:56:38 +0200 303) dev_dbg(mcore->dev->dev, "Initializing MIPS core...\n");
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 304)
7007d00caca26 (Felix Fietkau 2007-10-14 21:04:22 +0200 305) bus = mcore->dev->bus;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 306) hz = ssb_clockspeed(bus);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 307) if (!hz)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 308) hz = 100000000;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 309) ns = 1000000000 / hz;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 310)
0362063b7be97 (Hauke Mehrtens 2012-11-27 00:31:55 +0100 311) if (ssb_extif_available(&bus->extif))
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 312) ssb_extif_timing_init(&bus->extif, ns);
0362063b7be97 (Hauke Mehrtens 2012-11-27 00:31:55 +0100 313) else if (ssb_chipco_available(&bus->chipco))
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 314) ssb_chipco_timing_init(&bus->chipco, ns);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 315)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 316) /* Assign IRQs to all cores on the bus, start with irq line 2, because serial usually takes 1 */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 317) for (irq = 2, i = 0; i < bus->nr_devices; i++) {
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 318) int mips_irq;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 319) dev = &(bus->devices[i]);
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 320) mips_irq = ssb_mips_irq(dev);
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 321) if (mips_irq > 4)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 322) dev->irq = 0;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 323) else
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 324) dev->irq = mips_irq + 2;
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 325) if (dev->irq > 5)
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 326) continue;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 327) switch (dev->id.coreid) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 328) case SSB_DEV_USB11_HOST:
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 329) /* shouldn't need a separate irq line for non-4710, most of them have a proper
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 330) * external usb controller on the pci */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 331) if ((bus->chip_id == 0x4710) && (irq <= 4)) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 332) set_irq(dev, irq++);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 333) }
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 334) break;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 335) case SSB_DEV_PCI:
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 336) case SSB_DEV_ETHERNET:
aab547ce0d149 (Michael Buesch 2008-02-29 11:36:12 +0100 337) case SSB_DEV_ETHERNET_GBIT:
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 338) case SSB_DEV_80211:
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 339) case SSB_DEV_USB20_HOST:
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 340) /* These devices get their own IRQ line if available, the rest goes on IRQ0 */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 341) if (irq <= 4) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 342) set_irq(dev, irq++);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 343) break;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 344) }
df561f6688fef (Gustavo A. R. Silva 2020-08-23 17:36:59 -0500 345) fallthrough;
83e34f03ee9b8 (Jochen Friedrich 2010-02-03 21:28:11 +0100 346) case SSB_DEV_EXTIF:
83e34f03ee9b8 (Jochen Friedrich 2010-02-03 21:28:11 +0100 347) set_irq(dev, 0);
83e34f03ee9b8 (Jochen Friedrich 2010-02-03 21:28:11 +0100 348) break;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 349) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 350) }
b8b6069cf2087 (Michael Buesch 2018-07-31 21:56:38 +0200 351) dev_dbg(mcore->dev->dev, "after irq reconfiguration\n");
ea4bbfd0048c5 (Matthieu CASTET 2009-06-30 23:04:55 +0200 352) dump_irq(bus);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 353)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 354) ssb_mips_serial_init(mcore);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 355) ssb_mips_flash_detect(mcore);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 356) }