61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 1) /*
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 2) * Sonics Silicon Backplane
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 3) * Broadcom EXTIF core driver
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 4) *
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 5) * Copyright 2005, Broadcom Corporation
eb032b9837a95 (Michael Buesch 2011-07-04 20:50:05 +0200 6) * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 7) * Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 8) * Copyright 2007, Aurelien Jarno <aurelien@aurel32.net>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 9) *
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 10) * Licensed under the GNU/GPL. See COPYING for details.
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 11) */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 12)
b8b6069cf2087 (Michael Buesch 2018-07-31 21:56:38 +0200 13) #include "ssb_private.h"
b8b6069cf2087 (Michael Buesch 2018-07-31 21:56:38 +0200 14)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 15) #include <linux/serial.h>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 16) #include <linux/serial_core.h>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 17) #include <linux/serial_reg.h>
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 18)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 19)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 20) static inline u32 extif_read32(struct ssb_extif *extif, u16 offset)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 21) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 22) return ssb_read32(extif->dev, offset);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 23) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 24)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 25) static inline void extif_write32(struct ssb_extif *extif, u16 offset, u32 value)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 26) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 27) ssb_write32(extif->dev, offset, value);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 28) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 29)
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 30) static inline u32 extif_write32_masked(struct ssb_extif *extif, u16 offset,
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 31) u32 mask, u32 value)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 32) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 33) value &= mask;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 34) value |= extif_read32(extif, offset) & ~mask;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 35) extif_write32(extif, offset, value);
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 36)
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 37) return value;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 38) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 39)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 40) #ifdef CONFIG_SSB_SERIAL
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 41) static bool serial_exists(u8 *regs)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 42) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 43) u8 save_mcr, msr = 0;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 44)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 45) if (regs) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 46) save_mcr = regs[UART_MCR];
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 47) regs[UART_MCR] = (UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_RTS);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 48) msr = regs[UART_MSR] & (UART_MSR_DCD | UART_MSR_RI
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 49) | UART_MSR_CTS | UART_MSR_DSR);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 50) regs[UART_MCR] = save_mcr;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 51) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 52) return (msr == (UART_MSR_DCD | UART_MSR_CTS));
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 53) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 54)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 55) int ssb_extif_serial_init(struct ssb_extif *extif, struct ssb_serial_port *ports)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 56) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 57) u32 i, nr_ports = 0;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 58)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 59) /* Disable GPIO interrupt initially */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 60) extif_write32(extif, SSB_EXTIF_GPIO_INTPOL, 0);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 61) extif_write32(extif, SSB_EXTIF_GPIO_INTMASK, 0);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 62)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 63) for (i = 0; i < 2; i++) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 64) void __iomem *uart_regs;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 65)
4bdc0d676a643 (Christoph Hellwig 2020-01-06 09:43:50 +0100 66) uart_regs = ioremap(SSB_EUART, 16);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 67) if (uart_regs) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 68) uart_regs += (i * 8);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 69)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 70) if (serial_exists(uart_regs) && ports) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 71) extif_write32(extif, SSB_EXTIF_GPIO_INTMASK, 2);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 72)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 73) nr_ports++;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 74) ports[i].regs = uart_regs;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 75) ports[i].irq = 2;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 76) ports[i].baud_base = 13500000;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 77) ports[i].reg_shift = 0;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 78) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 79) iounmap(uart_regs);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 80) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 81) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 82) return nr_ports;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 83) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 84) #endif /* CONFIG_SSB_SERIAL */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 85)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 86) void ssb_extif_timing_init(struct ssb_extif *extif, unsigned long ns)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 87) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 88) u32 tmp;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 89)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 90) /* Initialize extif so we can get to the LEDs and external UART */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 91) extif_write32(extif, SSB_EXTIF_PROG_CFG, SSB_EXTCFG_EN);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 92)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 93) /* Set timing for the flash */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 94) tmp = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 95) tmp |= DIV_ROUND_UP(40, ns) << SSB_PROG_WCNT_1_SHIFT;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 96) tmp |= DIV_ROUND_UP(120, ns);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 97) extif_write32(extif, SSB_EXTIF_PROG_WAITCNT, tmp);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 98)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 99) /* Set programmable interface timing for external uart */
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 100) tmp = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 101) tmp |= DIV_ROUND_UP(20, ns) << SSB_PROG_WCNT_2_SHIFT;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 102) tmp |= DIV_ROUND_UP(100, ns) << SSB_PROG_WCNT_1_SHIFT;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 103) tmp |= DIV_ROUND_UP(120, ns);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 104) extif_write32(extif, SSB_EXTIF_PROG_WAITCNT, tmp);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 105) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 106)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 107) void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 108) u32 *pll_type, u32 *n, u32 *m)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 109) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 110) *pll_type = SSB_PLLTYPE_1;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 111) *n = extif_read32(extif, SSB_EXTIF_CLOCK_N);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 112) *m = extif_read32(extif, SSB_EXTIF_CLOCK_SB);
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 113) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 114)
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 115) u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks)
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 116) {
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 117) struct ssb_extif *extif = bcm47xx_wdt_get_drvdata(wdt);
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 118)
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 119) return ssb_extif_watchdog_timer_set(extif, ticks);
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 120) }
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 121)
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 122) u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms)
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 123) {
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 124) struct ssb_extif *extif = bcm47xx_wdt_get_drvdata(wdt);
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 125) u32 ticks = (SSB_EXTIF_WATCHDOG_CLK / 1000) * ms;
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 126)
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 127) ticks = ssb_extif_watchdog_timer_set(extif, ticks);
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 128)
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 129) return (ticks * 1000) / SSB_EXTIF_WATCHDOG_CLK;
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 130) }
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 131)
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 132) u32 ssb_extif_watchdog_timer_set(struct ssb_extif *extif, u32 ticks)
42bfad4f71637 (Michael Buesch 2008-02-19 12:41:30 +0100 133) {
7280b51a29f8e (Hauke Mehrtens 2012-12-05 18:46:06 +0100 134) if (ticks > SSB_EXTIF_WATCHDOG_MAX_TIMER)
7280b51a29f8e (Hauke Mehrtens 2012-12-05 18:46:06 +0100 135) ticks = SSB_EXTIF_WATCHDOG_MAX_TIMER;
42bfad4f71637 (Michael Buesch 2008-02-19 12:41:30 +0100 136) extif_write32(extif, SSB_EXTIF_WATCHDOG, ticks);
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 137)
9f640a6376e54 (Hauke Mehrtens 2012-12-05 18:46:07 +0100 138) return ticks;
42bfad4f71637 (Michael Buesch 2008-02-19 12:41:30 +0100 139) }
42bfad4f71637 (Michael Buesch 2008-02-19 12:41:30 +0100 140)
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 141) void ssb_extif_init(struct ssb_extif *extif)
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 142) {
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 143) if (!extif->dev)
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 144) return; /* We don't have a Extif core */
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 145) spin_lock_init(&extif->gpio_lock);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 146) }
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 147)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 148) u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 149) {
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 150) return extif_read32(extif, SSB_EXTIF_GPIO_IN) & mask;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 151) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 152)
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 153) u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 154) {
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 155) unsigned long flags;
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 156) u32 res = 0;
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 157)
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 158) spin_lock_irqsave(&extif->gpio_lock, flags);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 159) res = extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0),
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 160) mask, value);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 161) spin_unlock_irqrestore(&extif->gpio_lock, flags);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 162)
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 163) return res;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 164) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 165)
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 166) u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value)
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 167) {
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 168) unsigned long flags;
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 169) u32 res = 0;
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 170)
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 171) spin_lock_irqsave(&extif->gpio_lock, flags);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 172) res = extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0),
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 173) mask, value);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 174) spin_unlock_irqrestore(&extif->gpio_lock, flags);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 175)
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 176) return res;
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 177) }
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 178)
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 179) u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value)
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 180) {
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 181) unsigned long flags;
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 182) u32 res = 0;
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 183)
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 184) spin_lock_irqsave(&extif->gpio_lock, flags);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 185) res = extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 186) spin_unlock_irqrestore(&extif->gpio_lock, flags);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 187)
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 188) return res;
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 189) }
61e115a56d1aa (Michael Buesch 2007-09-18 15:12:50 -0400 190)
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 191) u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value)
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 192) {
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 193) unsigned long flags;
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 194) u32 res = 0;
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 195)
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 196) spin_lock_irqsave(&extif->gpio_lock, flags);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 197) res = extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 198) spin_unlock_irqrestore(&extif->gpio_lock, flags);
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 199)
394bc7e38be79 (Hauke Mehrtens 2012-11-20 22:24:32 +0000 200) return res;
c2bcbe65fc88d (Michael Buesch 2008-02-19 14:53:35 +0100 201) }
VisionFive2 Linux kernel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
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