1a59d1b8e05ea drivers/firewire/init_ohci1394_dma.c (Thomas Gleixner 2019-05-27 08:55:05 +0200 1) // SPDX-License-Identifier: GPL-2.0-or-later
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 2) /*
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 3) * init_ohci1394_dma.c - Initializes physical DMA on all OHCI 1394 controllers
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 4) *
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 5) * Copyright (C) 2006-2007 Bernhard Kaindl <bk@suse.de>
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 6) *
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 7) * Derived from drivers/ieee1394/ohci1394.c and arch/x86/kernel/early-quirks.c
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 8) * this file has functions to:
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 9) * - scan the PCI very early on boot for all OHCI 1394-compliant controllers
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 10) * - reset and initialize them and make them join the IEEE1394 bus and
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 11) * - enable physical DMA on them to allow remote debugging
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 12) *
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 13) * All code and data is marked as __init and __initdata, respective as
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 14) * during boot, all OHCI1394 controllers may be claimed by the firewire
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 15) * stack and at this point, this code should not touch them anymore.
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 16) *
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 17) * To use physical DMA after the initialization of the firewire stack,
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 18) * be sure that the stack enables it and (re-)attach after the bus reset
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 19) * which may be caused by the firewire stack initialization.
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 20) */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 21)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 22) #include <linux/delay.h>
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 23) #include <linux/io.h>
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 24) #include <linux/kernel.h>
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 25) #include <linux/pci.h> /* for PCI defines */
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 26) #include <linux/string.h>
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 27)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 28) #include <asm/pci-direct.h> /* for direct PCI config space access */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 29) #include <asm/fixmap.h>
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 30)
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 31) #include <linux/init_ohci1394_dma.h>
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 32) #include "ohci.h"
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 33)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 34) int __initdata init_ohci1394_dma_early;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 35)
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 36) struct ohci {
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 37) void __iomem *registers;
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 38) };
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 39)
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 40) static inline void reg_write(const struct ohci *ohci, int offset, u32 data)
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 41) {
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 42) writel(data, ohci->registers + offset);
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 43) }
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 44)
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 45) static inline u32 reg_read(const struct ohci *ohci, int offset)
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 46) {
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 47) return readl(ohci->registers + offset);
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 48) }
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 49)
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 50) #define OHCI_LOOP_COUNT 100 /* Number of loops for reg read waits */
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 51)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 52) /* Reads a PHY register of an OHCI-1394 controller */
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 53) static inline u8 __init get_phy_reg(struct ohci *ohci, u8 addr)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 54) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 55) int i;
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 56) u32 r;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 57)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 58) reg_write(ohci, OHCI1394_PhyControl, (addr << 8) | 0x00008000);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 59)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 60) for (i = 0; i < OHCI_LOOP_COUNT; i++) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 61) if (reg_read(ohci, OHCI1394_PhyControl) & 0x80000000)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 62) break;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 63) mdelay(1);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 64) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 65) r = reg_read(ohci, OHCI1394_PhyControl);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 66)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 67) return (r & 0x00ff0000) >> 16;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 68) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 69)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 70) /* Writes to a PHY register of an OHCI-1394 controller */
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 71) static inline void __init set_phy_reg(struct ohci *ohci, u8 addr, u8 data)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 72) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 73) int i;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 74)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 75) reg_write(ohci, OHCI1394_PhyControl, (addr << 8) | data | 0x00004000);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 76)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 77) for (i = 0; i < OHCI_LOOP_COUNT; i++) {
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 78) if (!(reg_read(ohci, OHCI1394_PhyControl) & 0x00004000))
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 79) break;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 80) mdelay(1);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 81) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 82) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 83)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 84) /* Resets an OHCI-1394 controller (for sane state before initialization) */
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 85) static inline void __init init_ohci1394_soft_reset(struct ohci *ohci)
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 86) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 87) int i;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 88)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 89) reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 90)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 91) for (i = 0; i < OHCI_LOOP_COUNT; i++) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 92) if (!(reg_read(ohci, OHCI1394_HCControlSet)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 93) & OHCI1394_HCControl_softReset))
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 94) break;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 95) mdelay(1);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 96) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 97) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 98)
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 99) #define OHCI1394_MAX_AT_REQ_RETRIES 0xf
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 100) #define OHCI1394_MAX_AT_RESP_RETRIES 0x2
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 101) #define OHCI1394_MAX_PHYS_RESP_RETRIES 0x8
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 102)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 103) /* Basic OHCI-1394 register and port inititalization */
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 104) static inline void __init init_ohci1394_initialize(struct ohci *ohci)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 105) {
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 106) u32 bus_options;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 107) int num_ports, i;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 108)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 109) /* Put some defaults to these undefined bus options */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 110) bus_options = reg_read(ohci, OHCI1394_BusOptions);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 111) bus_options |= 0x60000000; /* Enable CMC and ISC */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 112) bus_options &= ~0x00ff0000; /* XXX: Set cyc_clk_acc to zero for now */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 113) bus_options &= ~0x18000000; /* Disable PMC and BMC */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 114) reg_write(ohci, OHCI1394_BusOptions, bus_options);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 115)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 116) /* Set the bus number */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 117) reg_write(ohci, OHCI1394_NodeID, 0x0000ffc0);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 118)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 119) /* Enable posted writes */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 120) reg_write(ohci, OHCI1394_HCControlSet,
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 121) OHCI1394_HCControl_postedWriteEnable);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 122)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 123) /* Clear link control register */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 124) reg_write(ohci, OHCI1394_LinkControlClear, 0xffffffff);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 125)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 126) /* enable phys */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 127) reg_write(ohci, OHCI1394_LinkControlSet,
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 128) OHCI1394_LinkControl_rcvPhyPkt);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 129)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 130) /* Don't accept phy packets into AR request context */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 131) reg_write(ohci, OHCI1394_LinkControlClear, 0x00000400);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 132)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 133) /* Clear the Isochonouys interrupt masks */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 134) reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 0xffffffff);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 135) reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 0xffffffff);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 136) reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 0xffffffff);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 137) reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 0xffffffff);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 138)
b3834be5c42a5 drivers/firewire/init_ohci1394_dma.c (Adam Buchbinder 2012-09-19 21:48:02 -0400 139) /* Accept asynchronous transfer requests from all nodes for now */
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 140) reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 141)
b3834be5c42a5 drivers/firewire/init_ohci1394_dma.c (Adam Buchbinder 2012-09-19 21:48:02 -0400 142) /* Specify asynchronous transfer retries */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 143) reg_write(ohci, OHCI1394_ATRetries,
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 144) OHCI1394_MAX_AT_REQ_RETRIES |
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 145) (OHCI1394_MAX_AT_RESP_RETRIES<<4) |
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 146) (OHCI1394_MAX_PHYS_RESP_RETRIES<<8));
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 147)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 148) /* We don't want hardware swapping */
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 149) reg_write(ohci, OHCI1394_HCControlClear,
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 150) OHCI1394_HCControl_noByteSwapData);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 151)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 152) /* Enable link */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 153) reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_linkEnable);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 154)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 155) /* If anything is connected to a port, make sure it is enabled */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 156) num_ports = get_phy_reg(ohci, 2) & 0xf;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 157) for (i = 0; i < num_ports; i++) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 158) unsigned int status;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 159)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 160) set_phy_reg(ohci, 7, i);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 161) status = get_phy_reg(ohci, 8);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 162)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 163) if (status & 0x20)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 164) set_phy_reg(ohci, 8, status & ~1);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 165) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 166) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 167)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 168) /**
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 169) * init_ohci1394_wait_for_busresets - wait until bus resets are completed
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 170) *
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 171) * OHCI1394 initialization itself and any device going on- or offline
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 172) * and any cable issue cause a IEEE1394 bus reset. The OHCI1394 spec
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 173) * specifies that physical DMA is disabled on each bus reset and it
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 174) * has to be enabled after each bus reset when needed. We resort
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 175) * to polling here because on early boot, we have no interrupts.
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 176) */
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 177) static inline void __init init_ohci1394_wait_for_busresets(struct ohci *ohci)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 178) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 179) int i, events;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 180)
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 181) for (i = 0; i < 9; i++) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 182) mdelay(200);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 183) events = reg_read(ohci, OHCI1394_IntEventSet);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 184) if (events & OHCI1394_busReset)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 185) reg_write(ohci, OHCI1394_IntEventClear,
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 186) OHCI1394_busReset);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 187) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 188) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 189)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 190) /**
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 191) * init_ohci1394_enable_physical_dma - Enable physical DMA for remote debugging
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 192) * This enables remote DMA access over IEEE1394 from every host for the low
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 193) * 4GB of address space. DMA accesses above 4GB are not available currently.
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 194) */
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 195) static inline void __init init_ohci1394_enable_physical_dma(struct ohci *ohci)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 196) {
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 197) reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 0xffffffff);
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 198) reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 0xffffffff);
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 199) reg_write(ohci, OHCI1394_PhyUpperBound, 0xffff0000);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 200) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 201)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 202) /**
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 203) * init_ohci1394_reset_and_init_dma - init controller and enable DMA
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 204) * This initializes the given controller and enables physical DMA engine in it.
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 205) */
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 206) static inline void __init init_ohci1394_reset_and_init_dma(struct ohci *ohci)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 207) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 208) /* Start off with a soft reset, clears everything to a sane state. */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 209) init_ohci1394_soft_reset(ohci);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 210)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 211) /* Accessing some registers without LPS enabled may cause lock up */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 212) reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_LPS);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 213)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 214) /* Disable and clear interrupts */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 215) reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 216) reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 217)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 218) mdelay(50); /* Wait 50msec to make sure we have full link enabled */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 219)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 220) init_ohci1394_initialize(ohci);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 221) /*
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 222) * The initialization causes at least one IEEE1394 bus reset. Enabling
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 223) * physical DMA only works *after* *all* bus resets have calmed down:
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 224) */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 225) init_ohci1394_wait_for_busresets(ohci);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 226)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 227) /* We had to wait and do this now if we want to debug early problems */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 228) init_ohci1394_enable_physical_dma(ohci);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 229) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 230)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 231) /**
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 232) * init_ohci1394_controller - Map the registers of the controller and init DMA
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 233) * This maps the registers of the specified controller and initializes it
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 234) */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 235) static inline void __init init_ohci1394_controller(int num, int slot, int func)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 236) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 237) unsigned long ohci_base;
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 238) struct ohci ohci;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 239)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 240) printk(KERN_INFO "init_ohci1394_dma: initializing OHCI-1394"
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 241) " at %02x:%02x.%x\n", num, slot, func);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 242)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 243) ohci_base = read_pci_config(num, slot, func, PCI_BASE_ADDRESS_0+(0<<2))
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 244) & PCI_BASE_ADDRESS_MEM_MASK;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 245)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 246) set_fixmap_nocache(FIX_OHCI1394_BASE, ohci_base);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 247)
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 248) ohci.registers = (void __iomem *)fix_to_virt(FIX_OHCI1394_BASE);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 249)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 250) init_ohci1394_reset_and_init_dma(&ohci);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 251) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 252)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 253) /**
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 254) * debug_init_ohci1394_dma - scan for OHCI1394 controllers and init DMA on them
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 255) * Scans the whole PCI space for OHCI1394 controllers and inits DMA on them
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 256) */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 257) void __init init_ohci1394_dma_on_all_controllers(void)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 258) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 259) int num, slot, func;
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 260) u32 class;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 261)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 262) if (!early_pci_allowed())
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 263) return;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 264)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 265) /* Poor man's PCI discovery, the only thing we can do at early boot */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 266) for (num = 0; num < 32; num++) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 267) for (slot = 0; slot < 32; slot++) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 268) for (func = 0; func < 8; func++) {
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 269) class = read_pci_config(num, slot, func,
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 270) PCI_CLASS_REVISION);
1ef5b816c0eaf drivers/firewire/init_ohci1394_dma.c (Stefan Richter 2010-10-10 00:54:02 +0200 271) if (class == 0xffffffff)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 272) continue; /* No device at this func */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 273)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 274) if (class>>8 != PCI_CLASS_SERIAL_FIREWIRE_OHCI)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 275) continue; /* Not an OHCI-1394 device */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 276)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 277) init_ohci1394_controller(num, slot, func);
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 278) break; /* Assume one controller per device */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 279) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 280) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 281) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 282) printk(KERN_INFO "init_ohci1394_dma: finished initializing OHCI DMA\n");
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 283) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 284)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 285) /**
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 286) * setup_init_ohci1394_early - enables early OHCI1394 DMA initialization
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 287) */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 288) static int __init setup_ohci1394_dma(char *opt)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 289) {
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 290) if (!strcmp(opt, "early"))
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 291) init_ohci1394_dma_early = 1;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 292) return 0;
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 293) }
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 294)
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 295) /* passing ohci1394_dma=early on boot causes early OHCI1394 DMA initialization */
f212ec4b7b4d8 drivers/ieee1394/init_ohci1394_dma.c (Bernhard Kaindl 2008-01-30 13:34:11 +0100 296) early_param("ohci1394_dma", setup_ohci1394_dma);
VisionFive2 Linux kernel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
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