VisionFive2 Linux kernel

StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

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4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000  1) /* SPDX-License-Identifier: GPL-2.0 */
03963caeb0dd7 (Gilad Ben-Yossef 2019-04-18 16:38:53 +0300  2) /* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000  3) 
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000  4) #ifndef _CC_LLI_DEFS_H_
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000  5) #define _CC_LLI_DEFS_H_
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000  6) 
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000  7) #include <linux/types.h>
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000  8) 
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000  9) /* Max DLLI size
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 10)  *  AKA CC_DSCRPTR_QUEUE_WORD1_DIN_SIZE_BIT_SIZE
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 11)  */
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 12) #define DLLI_SIZE_BIT_SIZE	0x18
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 13) 
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 14) #define CC_MAX_MLLI_ENTRY_SIZE 0xFFFF
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 15) 
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 16) #define LLI_MAX_NUM_OF_DATA_ENTRIES 128
18dd574acdb70 (Gilad Ben-Yossef 2019-04-18 16:39:03 +0300 17) #define LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES 8
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 18) #define MLLI_TABLE_MIN_ALIGNMENT 4 /* 32 bit alignment */
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 19) #define MAX_NUM_OF_BUFFERS_IN_MLLI 4
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 20) #define MAX_NUM_OF_TOTAL_MLLI_ENTRIES \
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 21) 		(2 * LLI_MAX_NUM_OF_DATA_ENTRIES + \
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 22) 		 LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 23) 
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 24) /* Size of entry */
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 25) #define LLI_ENTRY_WORD_SIZE 2
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 26) #define LLI_ENTRY_BYTE_SIZE (LLI_ENTRY_WORD_SIZE * sizeof(u32))
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 27) 
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 28) /* Word0[31:0] = ADDR[31:0] */
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 29) #define LLI_WORD0_OFFSET 0
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 30) #define LLI_LADDR_BIT_OFFSET 0
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 31) #define LLI_LADDR_BIT_SIZE 32
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 32) /* Word1[31:16] = ADDR[47:32]; Word1[15:0] = SIZE */
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 33) #define LLI_WORD1_OFFSET 1
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 34) #define LLI_SIZE_BIT_OFFSET 0
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 35) #define LLI_SIZE_BIT_SIZE 16
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 36) #define LLI_HADDR_BIT_OFFSET 16
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 37) #define LLI_HADDR_BIT_SIZE 16
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 38) 
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 39) #define LLI_SIZE_MASK GENMASK((LLI_SIZE_BIT_SIZE - 1), LLI_SIZE_BIT_OFFSET)
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 40) #define LLI_HADDR_MASK GENMASK( \
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 41) 			       (LLI_HADDR_BIT_OFFSET + LLI_HADDR_BIT_SIZE - 1),\
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 42) 				LLI_HADDR_BIT_OFFSET)
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 43) 
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 44) static inline void cc_lli_set_addr(u32 *lli_p, dma_addr_t addr)
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 45) {
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 46) 	lli_p[LLI_WORD0_OFFSET] = (addr & U32_MAX);
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 47) #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 48) 	lli_p[LLI_WORD1_OFFSET] &= ~LLI_HADDR_MASK;
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 49) 	lli_p[LLI_WORD1_OFFSET] |= FIELD_PREP(LLI_HADDR_MASK, (addr >> 32));
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 50) #endif /* CONFIG_ARCH_DMA_ADDR_T_64BIT */
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 51) }
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 52) 
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 53) static inline void cc_lli_set_size(u32 *lli_p, u16 size)
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 54) {
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 55) 	lli_p[LLI_WORD1_OFFSET] &= ~LLI_SIZE_MASK;
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 56) 	lli_p[LLI_WORD1_OFFSET] |= FIELD_PREP(LLI_SIZE_MASK, size);
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 57) }
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 58) 
4c3f97276e156 (Gilad Ben-Yossef 2018-01-22 09:27:00 +0000 59) #endif /*_CC_LLI_DEFS_H_*/