author: Andy Hu <andy.hu@starfivetech.com> 2023-07-27 10:08:47 +0800
committer: Andy Hu <andy.hu@starfivetech.com> 2023-07-27 10:08:47 +0800
commit: 1b99c6baeeb7a60d6302f824fbddecf0b3b0a855
parent: e41350c90c4a84224ad56e8466cd256a46deb0e9
Commit Summary:
Diffstat:
13 files changed, 61 insertions, 90 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts
index 68841c2d26d8..c145953f5ed5 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts
@@ -16,13 +16,14 @@
/* default sd card */
&sdio0 {
+ assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>;
+ assigned-clock-rates = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdcard0_pins>;
max-frequency = <100000000>;
card-detect-delay = <300>;
bus-width = <4>;
broken-cd;
- cap-sd-highspeed;
post-power-on-delay-ms = <200>;
status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts
index 51098db97b07..4e3a738cbeea 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts
@@ -14,13 +14,14 @@
/* default sd card */
&sdio0 {
+ assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>;
+ assigned-clock-rates = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdcard0_pins>;
max-frequency = <100000000>;
card-detect-delay = <300>;
bus-width = <4>;
broken-cd;
- cap-sd-highspeed;
post-power-on-delay-ms = <200>;
status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-i2s-ac108.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-i2s-ac108.dts
index 2f30e5b79d6a..42c44e2a4c5b 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-evb-i2s-ac108.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-i2s-ac108.dts
@@ -15,13 +15,14 @@
/* default sd card */
&sdio0 {
+ assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>;
+ assigned-clock-rates = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdcard0_pins>;
max-frequency = <100000000>;
card-detect-delay = <300>;
bus-width = <4>;
broken-cd;
- cap-sd-highspeed;
post-power-on-delay-ms = <200>;
status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-pcie-i2s-sd.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-pcie-i2s-sd.dts
index d7fe195460ba..0515ac0812c6 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-evb-pcie-i2s-sd.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-pcie-i2s-sd.dts
@@ -15,13 +15,14 @@
/* default sd card */
&sdio0 {
+ assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>;
+ assigned-clock-rates = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdcard0_pins>;
max-frequency = <100000000>;
card-detect-delay = <300>;
bus-width = <4>;
broken-cd;
- cap-sd-highspeed;
post-power-on-delay-ms = <200>;
status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-spi-uart2.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-spi-uart2.dts
index 4aeb2eb3b24f..fbbbc1a9671d 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-evb-spi-uart2.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-spi-uart2.dts
@@ -14,13 +14,14 @@
/* default sd card */
&sdio0 {
+ assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>;
+ assigned-clock-rates = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdcard0_pins>;
max-frequency = <100000000>;
card-detect-delay = <300>;
bus-width = <4>;
broken-cd;
- cap-sd-highspeed;
post-power-on-delay-ms = <200>;
status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts
index f5be5ea46a63..1fb5d5f0c691 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts
@@ -14,13 +14,14 @@
/* default sd card */
&sdio0 {
+ assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>;
+ assigned-clock-rates = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdcard0_pins>;
max-frequency = <100000000>;
card-detect-delay = <300>;
bus-width = <4>;
broken-cd;
- cap-sd-highspeed;
post-power-on-delay-ms = <200>;
status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-uart4-emmc-spdif.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-uart4-emmc-spdif.dts
index f1388c4eebe2..506e7e69918f 100755
--- a/arch/riscv/boot/dts/starfive/jh7110-evb-uart4-emmc-spdif.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-uart4-emmc-spdif.dts
@@ -27,12 +27,15 @@
};
&sdio0 {
+ assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>;
+ assigned-clock-rates = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
max-frequency = <100000000>;
card-detect-delay = <300>;
bus-width = <8>;
cap-mmc-highspeed;
+ mmc-hs200-1_8v;
non-removable;
cap-mmc-hw-reset;
post-power-on-delay-ms = <200>;
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-uart5-pwm-i2c-tdm.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-uart5-pwm-i2c-tdm.dts
index 4ba622c459bf..e0257dd4e523 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-evb-uart5-pwm-i2c-tdm.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-uart5-pwm-i2c-tdm.dts
@@ -15,13 +15,14 @@
/* default sd card */
&sdio0 {
+ assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>;
+ assigned-clock-rates = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdcard0_pins>;
max-frequency = <100000000>;
card-detect-delay = <300>;
bus-width = <4>;
broken-cd;
- cap-sd-highspeed;
post-power-on-delay-ms = <200>;
status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-usbdevice.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-usbdevice.dts
index f9d67ae839d9..945f22c9e2e6 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-evb-usbdevice.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-usbdevice.dts
@@ -14,13 +14,14 @@
/* default sd card */
&sdio0 {
+ assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>;
+ assigned-clock-rates = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdcard0_pins>;
max-frequency = <100000000>;
card-detect-delay = <300>;
bus-width = <4>;
broken-cd;
- cap-sd-highspeed;
post-power-on-delay-ms = <200>;
status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb.dts b/arch/riscv/boot/dts/starfive/jh7110-evb.dts
index 73db0ce7bafb..64b616b6eae2 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-evb.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb.dts
@@ -14,6 +14,8 @@
/* default sd card */
&sdio0 {
+ assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>;
+ assigned-clock-rates = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdcard0_pins>;
max-frequency = <100000000>;
@@ -22,12 +24,6 @@
no-sdio;
no-mmc;
broken-cd;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- sd-uhs-ddr50;
- cap-sd-highspeed;
post-power-on-delay-ms = <200>;
status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 3e2ab987475a..96a6af93134f 100755
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -884,7 +884,6 @@
fifo-depth = <32>;
fifo-watermark-aligned;
data-addr = <0>;
- starfive,sys-syscon = <&sys_syscon 0x14 0x1a 0x7c000000>;
status = "disabled";
};
@@ -901,7 +900,6 @@
fifo-depth = <32>;
fifo-watermark-aligned;
data-addr = <0>;
- starfive,sys-syscon = <&sys_syscon 0x9c 0x1 0x3e>;
status = "disabled";
};
diff --git a/drivers/mmc/host/dw_mmc-starfive.c b/drivers/mmc/host/dw_mmc-starfive.c
index a65d578452c2..0bc3403caece 100644
--- a/drivers/mmc/host/dw_mmc-starfive.c
+++ b/drivers/mmc/host/dw_mmc-starfive.c
@@ -52,109 +52,70 @@ static void dw_mci_starfive_set_ios(struct dw_mci *host, struct mmc_ios *ios)
}
}
+static void dw_mci_starfive_hs_set_bits(struct dw_mci *host, u32 smpl_phase)
+{
+ /* change driver phase and sample phase */
+ u32 mask = 0x1f;
+ u32 reg_value;
+
+ reg_value = mci_readl(host, UHS_REG_EXT);
+
+ /* In UHS_REG_EXT, only 5 bits valid in DRV_PHASE and SMPL_PHASE */
+ reg_value &= ~(mask << 16);
+ reg_value |= (smpl_phase << 16);
+ mci_writel(host, UHS_REG_EXT, reg_value);
+
+ /* We should delay 1ms wait for timing setting finished. */
+ udelay(1000);
+}
+
static int dw_mci_starfive_execute_tuning(struct dw_mci_slot *slot,
u32 opcode)
{
static const int grade = MAX_DELAY_CHAIN;
struct dw_mci *host = slot->host;
- struct starfive_priv *priv = host->priv;
- int raise_point = -1, fall_point = -1;
- int err, prev_err = -1;
- int found = 0;
+ int err = -1;
+ int smpl_phase, smpl_raise = -1, smpl_fall = -1;
int i;
- u32 regval;
for (i = 0; i < grade; i++) {
- regval = i << priv->syscon_shift;
- err = regmap_update_bits(priv->reg_syscon, priv->syscon_offset, priv->syscon_mask, regval);
- if (err)
- return err;
+ smpl_phase = i;
+ dw_mci_starfive_hs_set_bits(host, smpl_phase);
mci_writel(host, RINTSTS, ALL_INT_CLR);
err = mmc_send_tuning(slot->mmc, opcode, NULL);
- if (!err)
- found = 1;
-
- if (i > 0) {
- if (err && !prev_err)
- fall_point = i - 1;
- if (!err && prev_err)
- raise_point = i;
- }
- if (raise_point != -1 && fall_point != -1)
- goto tuning_out;
-
- prev_err = err;
- err = 0;
+ if (!err && smpl_raise < 0)
+ smpl_raise = i;
+ else if (err && smpl_raise >= 0) {
+ smpl_fall = i - 1;
+ break;
+ }
}
-tuning_out:
- if (found) {
- if (raise_point == -1)
- raise_point = 0;
- if (fall_point == -1)
- fall_point = grade - 1;
- if (fall_point < raise_point) {
- if ((raise_point + fall_point) >
- (grade - 1))
- i = fall_point / 2;
- else
- i = (raise_point + grade - 1) / 2;
- } else {
- i = (raise_point + fall_point) / 2;
- }
+ if (i >= grade && smpl_raise >= 0)
+ smpl_fall = grade - 1 ;
- regval = i << priv->syscon_shift;
- err = regmap_update_bits(priv->reg_syscon, priv->syscon_offset, priv->syscon_mask, regval);
- if (err)
- return err;
- dev_dbg(host->dev, "Found valid delay chain! use it [delay=%d]\n", i);
- } else {
+ if (smpl_raise < 0) {
dev_err(host->dev, "No valid delay chain! use default\n");
+ dw_mci_starfive_hs_set_bits(host, 0);
err = -EINVAL;
}
+ else {
+ smpl_phase = (smpl_raise + smpl_fall) / 2;
+ dw_mci_starfive_hs_set_bits(host, smpl_phase);
+ dev_dbg(host->dev, "Found valid delay chain! use it [delay=%d]\n", smpl_phase);
+ err = 0;
+ }
mci_writel(host, RINTSTS, ALL_INT_CLR);
return err;
}
-static int dw_mci_starfive_parse_dt(struct dw_mci *host)
-{
- struct of_phandle_args args;
- struct starfive_priv *priv;
- int ret;
-
- priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- ret = of_parse_phandle_with_fixed_args(host->dev->of_node,
- "starfive,sys-syscon", 3, 0, &args);
- if (ret) {
- dev_err(host->dev, "Failed to parse starfive,sys-syscon\n");
- return -EINVAL;
- }
-
- priv->reg_syscon = syscon_node_to_regmap(args.np);
- of_node_put(args.np);
- if (IS_ERR(priv->reg_syscon))
- return PTR_ERR(priv->reg_syscon);
-
- priv->syscon_offset = args.args[0];
- priv->syscon_shift = args.args[1];
- priv->syscon_mask = args.args[2];
-
- host->priv = priv;
-
- return 0;
-}
-
static const struct dw_mci_drv_data starfive_data = {
.caps = dw_mci_starfive_caps,
.num_caps = ARRAY_SIZE(dw_mci_starfive_caps),
.set_ios = dw_mci_starfive_set_ios,
- .parse_dt = dw_mci_starfive_parse_dt,
.execute_tuning = dw_mci_starfive_execute_tuning,
};
diff --git a/drivers/net/can/ipms_canfd.c b/drivers/net/can/ipms_canfd.c
index d8aea010cef7..b93266b900fc 100644
--- a/drivers/net/can/ipms_canfd.c
+++ b/drivers/net/can/ipms_canfd.c
@@ -180,10 +180,10 @@ struct ipms_canfd_priv {
static struct can_bittiming_const canfd_bittiming_const = {
.name = DRIVER_NAME,
.tseg1_min = 2,
- .tseg1_max = 65,
- .tseg2_min = 1,
+ .tseg1_max = 16,
+ .tseg2_min = 2,
.tseg2_max = 8,
- .sjw_max = 16,
+ .sjw_max = 4,
.brp_min = 1,
.brp_max = 512,
.brp_inc = 1,
@@ -192,9 +192,9 @@ static struct can_bittiming_const canfd_bittiming_const = {
static struct can_bittiming_const canfd_data_bittiming_const = {
.name = DRIVER_NAME,
- .tseg1_min = 2,
- .tseg1_max = 17,
- .tseg2_min = 1,
+ .tseg1_min = 1,
+ .tseg1_max = 16,
+ .tseg2_min = 2,
.tseg2_max = 8,
.sjw_max = 8,
.brp_min = 1,