author: andy.hu <andy.hu@starfivetech.com> 2023-03-03 08:01:08 +0000
committer: andy.hu <andy.hu@starfivetech.com> 2023-03-03 08:01:08 +0000
commit: 9d1583f54129ddbeece7f9d0be2911b572b2551a
parent: 81bfb207e91c26e3f2f803e74ee7a126de37904c
Commit Summary:
Diffstat:
5 files changed, 2 insertions, 196 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 9ff87012a0d7..d0b7b4242f8e 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -31,6 +31,7 @@
opp-750000000 {
opp-hz = /bits/ 64 <750000000>;
opp-microvolt = <800000>;
+ opp-suspend;
};
opp-1500000000 {
opp-hz = /bits/ 64 <1500000000>;
diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
index d3ea993aac40..442cb2eb4a79 100644
--- a/drivers/cpufreq/Kconfig
+++ b/drivers/cpufreq/Kconfig
@@ -334,7 +334,4 @@ config QORIQ_CPUFREQ
endif
-if RISCV
-source "drivers/cpufreq/Kconfig.riscv"
-endif
endmenu
diff --git a/drivers/cpufreq/Kconfig.riscv b/drivers/cpufreq/Kconfig.riscv
deleted file mode 100644
index b375e264ac52..000000000000
--- a/drivers/cpufreq/Kconfig.riscv
+++ /dev/null
@@ -1,15 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# RISCV CPU Frequency scaling drivers
-#
-
-config RISCV_STARFIVE_CPUFREQ
- bool "Starfive JH7110"
- depends on SOC_STARFIVE
- default y
- help
- This adds the CPUFreq driver for Starfive SoC.
-
- If in doubt, say N.
-
-
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index e085a16b8430..9faff7ffeaed 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -92,6 +92,7 @@ static const struct of_device_id whitelist[] __initconst = {
{ .compatible = "xlnx,zynq-7000", },
{ .compatible = "xlnx,zynqmp", },
+ { .compatible = "starfive,jh7110", },
{ }
};
@@ -153,7 +154,6 @@ static const struct of_device_id blacklist[] __initconst = {
{ .compatible = "qcom,apq8064", },
{ .compatible = "qcom,msm8974", },
{ .compatible = "qcom,msm8960", },
- { .compatible = "starfive,jh7110", },
{ }
};
diff --git a/drivers/cpufreq/starfive-cpufreq.c b/drivers/cpufreq/starfive-cpufreq.c
deleted file mode 100644
index 40e5fedafd6b..000000000000
--- a/drivers/cpufreq/starfive-cpufreq.c
+++ /dev/null
@@ -1,216 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright 2022 StarFive Technology Co., Ltd.
- *
- * Starfive CPUfreq Support
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/regulator/consumer.h>
-#include <linux/mod_devicetable.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/pm_opp.h>
-
-
-#define VOLT_TOL (10000)
-
-struct starfive_cpu_dvfs_info {
- struct regulator *vddcpu;
- struct clk *cpu_clk;
- unsigned long regulator_latency;
- struct device *cpu_dev;
- struct cpumask cpus;
-};
-
-static int starfive_cpufreq_set_target_index(struct cpufreq_policy *policy,
- unsigned int index)
-{
- struct cpufreq_frequency_table *freq_table = policy->freq_table;
- struct starfive_cpu_dvfs_info *info = cpufreq_get_driver_data();
- struct dev_pm_opp *opp;
- unsigned long old_freq, new_freq;
- int old_vdd, target_vdd, ret;
-
- old_freq = clk_get_rate(info->cpu_clk);
- old_vdd = regulator_get_voltage(info->vddcpu);
- if (old_vdd < 0) {
- pr_err("Invalid cpu regulator value: %d\n", old_vdd);
- return old_vdd;
- }
-
- new_freq = freq_table[index].frequency * 1000;
- opp = dev_pm_opp_find_freq_ceil(info->cpu_dev, &new_freq);
- if (IS_ERR(opp)) {
- pr_err("Failed to find OPP for %ld\n", new_freq);
- return PTR_ERR(opp);
- }
- target_vdd = dev_pm_opp_get_voltage(opp);
- dev_pm_opp_put(opp);
-
-
- if (info->vddcpu && new_freq > old_freq) {
- ret = regulator_set_voltage(info->vddcpu,
- target_vdd, target_vdd + VOLT_TOL);
- if (ret != 0) {
- pr_err("Failed to set vddcpu for %ldkHz: %d\n",
- new_freq, ret);
- return ret;
- }
- }
-
- ret = clk_set_rate(info->cpu_clk, new_freq);
- if (ret < 0) {
- pr_err("Failed to set rate %ldkHz: %d\n",
- new_freq, ret);
- }
-
- if (info->vddcpu && new_freq < old_freq) {
- ret = regulator_set_voltage(info->vddcpu,
- target_vdd, target_vdd + VOLT_TOL);
- if (ret != 0) {
- pr_err("Failed to set vddcpu for %ldkHz: %d\n",
- new_freq, ret);
- if (clk_set_rate(policy->clk, old_freq * 1000) < 0)
- pr_err("Failed to restore original clock rate\n");
-
- return ret;
- }
- }
-
- pr_debug("Set actual frequency %lukHz\n",
- clk_get_rate(policy->clk) / 1000);
-
- return 0;
-}
-
-static int starfive_cpufreq_driver_init(struct cpufreq_policy *policy)
-{
- struct starfive_cpu_dvfs_info *info = cpufreq_get_driver_data();
- struct cpufreq_frequency_table *freq_table;
- int ret;
-
- ret = dev_pm_opp_init_cpufreq_table(info->cpu_dev, &freq_table);
- if (ret) {
- pr_err("Failed to init cpufreq table for cpu%d: %d\n",
- policy->cpu, ret);
- return ret;
- }
-
- cpumask_copy(policy->cpus, &info->cpus);
- policy->freq_table = freq_table;
- policy->driver_data = info;
- policy->clk = info->cpu_clk;
-
- return 0;
-}
-
-static int starfive_cpu_dvfs_info_init(struct platform_device *pdev,
- struct starfive_cpu_dvfs_info *info)
-{
- struct device *dev = &pdev->dev;
- int ret;
- static int retry = 3;
-
- info->vddcpu = regulator_get_optional(&pdev->dev, "cpu_vdd");
- if (IS_ERR(info->vddcpu)) {
- if (PTR_ERR(info->vddcpu) == -EPROBE_DEFER)
- dev_warn(&pdev->dev, "The cpu regulator is not ready, retry.\n");
- else
- dev_err(&pdev->dev, "Failed to get regulator for cpu!\n");
- if (retry-- > 0)
- return -EPROBE_DEFER;
- else
- return PTR_ERR(info->vddcpu);
- }
-
- info->cpu_clk = devm_clk_get(dev, "cpu_clk");
- if (IS_ERR(info->cpu_clk)) {
- dev_err(&pdev->dev, "Unable to obtain cpu_clk: %ld\n",
- PTR_ERR(info->cpu_clk));
- return PTR_ERR(info->cpu_clk);
- }
-
- info->cpu_dev = get_cpu_device(1);
- if (!info->cpu_dev) {
- dev_err(&pdev->dev, "Failed to get cpu device\n");
- return -ENODEV;
- }
- /* Get OPP-sharing information from "operating-points-v2" bindings */
- ret = dev_pm_opp_of_get_sharing_cpus(info->cpu_dev, &info->cpus);
- if (ret) {
- dev_err(&pdev->dev, "Failed to get OPP-sharing information for cpu\n");
- return -EINVAL;
- }
-
- ret = dev_pm_opp_of_cpumask_add_table(&info->cpus);
- if (ret) {
- pr_warn("no OPP table for cpu\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
-static struct cpufreq_driver starfive_cpufreq_driver = {
- .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
- .verify = cpufreq_generic_frequency_table_verify,
- .target_index = starfive_cpufreq_set_target_index,
- .get = cpufreq_generic_get,
- .init = starfive_cpufreq_driver_init,
- .name = "starfive-cpufreq",
- .attr = cpufreq_generic_attr,
-};
-
-static int starfive_cpufreq_probe(struct platform_device *pdev)
-{
- struct starfive_cpu_dvfs_info *info;
- int ret;
-
- info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
- if (!info)
- return -ENOMEM;
-
- ret = starfive_cpu_dvfs_info_init(pdev, info);
- if (ret) {
- dev_err(&pdev->dev, "Failed to init starfive cpu dvfs info\n");
- return ret;
- }
-
- starfive_cpufreq_driver.driver_data = info;
- ret = cpufreq_register_driver(&starfive_cpufreq_driver);
- if (ret)
- dev_err(&pdev->dev, "Failed to register starfive cpufreq driver\n");
-
- return ret;
-
-}
-
-static const struct of_device_id starfive_cpufreq_match_table[] = {
- { .compatible = "starfive,jh7110-cpufreq" },
- {}
-};
-
-static struct platform_driver starfive_cpufreq_plat_driver = {
- .probe = starfive_cpufreq_probe,
- .driver = {
- .name = "starfive-cpufreq",
- .of_match_table = starfive_cpufreq_match_table,
- },
-};
-
-static int __init starfive_cpufreq_init(void)
-{
- return platform_driver_register(&starfive_cpufreq_plat_driver);
-}
-device_initcall(starfive_cpufreq_init);
-
-MODULE_DESCRIPTION("STARFIVE CPUFREQ Driver");
-MODULE_AUTHOR("Mason Huuo <mason.huo@starfivetech.com>");
-MODULE_LICENSE("GPL v2");
-