author: andy.hu <andy.hu@starfivetech.com> 2023-03-30 13:01:19 +0000
committer: andy.hu <andy.hu@starfivetech.com> 2023-03-30 13:01:19 +0000
commit: 1e8430fc803f7062bac251552c0c8f8f9f23edbd
parent: 0e3f6f01b4182c2bce8cd6eb1d1421fa2e70c563
Commit Summary:
Diffstat:
4 files changed, 37 insertions, 53 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index ee6596d02b28..fbc468b4bad2 100755
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -588,24 +588,6 @@
};
};
-&pcie0 {
- pinctrl-names = "perst-default", "perst-active", "power-default", "power-active";
- pinctrl-0 = <&pcie0_perst_default>;
- pinctrl-1 = <&pcie0_perst_active>;
- pinctrl-2 = <&pcie0_power_default>;
- pinctrl-3 = <&pcie0_power_active>;
- status = "disabled";
-};
-
-&pcie1 {
- pinctrl-names = "perst-default", "perst-active", "power-default", "power-active";
- pinctrl-0 = <&pcie1_perst_default>;
- pinctrl-1 = <&pcie1_perst_active>;
- pinctrl-2 = <&pcie1_power_default>;
- pinctrl-3 = <&pcie1_power_active>;
- status = "disabled";
-};
-
&mailbox_contrl0 {
status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb.dtsi b/arch/riscv/boot/dts/starfive/jh7110-evb.dtsi
index 06e0de87d41a..bd08c242fb67 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-evb.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb.dtsi
@@ -51,3 +51,15 @@
};
};
};
+
+&pcie0 {
+ power-gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
+ status = "disabled";
+};
+
+&pcie1 {
+ power-gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+ status = "disabled";
+};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi
index c79ba3a58af2..f47ed4b7dcfa 100755
--- a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi
@@ -659,20 +659,18 @@
};
&pcie0 {
- pinctrl-names = "default", "perst-default", "perst-active";
+ pinctrl-names = "default";
pinctrl-0 = <&pcie0_wake_default>,
<&pcie0_clkreq_default>;
- pinctrl-1 = <&pcie0_perst_default>;
- pinctrl-2 = <&pcie0_perst_active>;
+ reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
status = "okay";
};
&pcie1 {
- pinctrl-names = "default", "perst-default", "perst-active";
+ pinctrl-names = "default";
pinctrl-0 = <&pcie1_wake_default>,
<&pcie1_clkreq_default>;
- pinctrl-1 = <&pcie1_perst_default>;
- pinctrl-2 = <&pcie1_perst_active>;
+ reset-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
status = "okay";
};
diff --git a/drivers/pci/controller/pcie-plda.c b/drivers/pci/controller/pcie-plda.c
index fc5c7ecee628..a8c199b9aaa7 100644
--- a/drivers/pci/controller/pcie-plda.c
+++ b/drivers/pci/controller/pcie-plda.c
@@ -16,6 +16,7 @@
*/
#include <linux/clk.h>
+#include <linux/gpio/consumer.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/irqchip/chained_irq.h>
@@ -163,9 +164,8 @@ struct plda_pcie {
struct clk_bulk_data *clks;
int num_clks;
int atr_table_num;
- struct pinctrl *pinctrl;
- struct pinctrl_state *perst_state_def;
- struct pinctrl_state *perst_state_active;
+ struct gpio_desc *power_gpio;
+ struct gpio_desc *reset_gpio;
};
static inline void plda_writel(struct plda_pcie *pcie, const u32 value,
@@ -743,28 +743,20 @@ static void plda_clk_rst_deinit(struct plda_pcie *pcie)
clk_bulk_disable_unprepare(pcie->num_clks, pcie->clks);
}
-int plda_pinctrl_init(struct plda_pcie *pcie)
+int plda_gpio_init(struct plda_pcie *pcie)
{
struct device *dev = &pcie->pdev->dev;
- pcie->pinctrl = devm_pinctrl_get(dev);
- if (IS_ERR_OR_NULL(pcie->pinctrl)) {
- dev_err(dev, "Getting pinctrl handle failed\n");
+ pcie->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR_OR_NULL(pcie->reset_gpio)) {
+ dev_warn(dev, "Failed to get reset-gpio.\n");
return -EINVAL;
}
- pcie->perst_state_def
- = pinctrl_lookup_state(pcie->pinctrl, "perst-default");
- if (IS_ERR_OR_NULL(pcie->perst_state_def)) {
- dev_err(dev, "Failed to get the perst-default pinctrl handle\n");
- return -EINVAL;
- }
-
- pcie->perst_state_active
- = pinctrl_lookup_state(pcie->pinctrl, "perst-active");
- if (IS_ERR_OR_NULL(pcie->perst_state_active)) {
- dev_err(dev, "Failed to get the perst-active pinctrl handle\n");
- return -EINVAL;
+ pcie->power_gpio = devm_gpiod_get_optional(dev, "power", GPIOD_OUT_LOW);
+ if (IS_ERR_OR_NULL(pcie->power_gpio)) {
+ dev_warn(dev, "Failed to get power-gpio, but maybe it's always on.\n");
+ pcie->power_gpio = NULL;
}
return 0;
@@ -776,11 +768,11 @@ static void plda_pcie_hw_init(struct plda_pcie *pcie)
int i, ret;
struct device *dev = &pcie->pdev->dev;
- if (pcie->perst_state_active) {
- ret = pinctrl_select_state(pcie->pinctrl, pcie->perst_state_active);
- if (ret)
- dev_err(dev, "Cannot set reset pin to low\n");
- }
+ if (pcie->power_gpio)
+ gpiod_set_value_cansleep(pcie->power_gpio, 1);
+
+ if (pcie->reset_gpio)
+ gpiod_set_value_cansleep(pcie->reset_gpio, 1);
/* Disable physical functions except #0 */
for (i = 1; i < PLDA_FUNC_NUM; i++) {
@@ -853,11 +845,9 @@ static void plda_pcie_hw_init(struct plda_pcie *pcie)
/* Ensure that PERST has been asserted for at least 100 ms */
msleep(300);
- if (pcie->perst_state_def) {
- ret = pinctrl_select_state(pcie->pinctrl, pcie->perst_state_def);
- if (ret)
- dev_err(dev, "Cannot set reset pin to high\n");
- }
+ if (pcie->reset_gpio)
+ gpiod_set_value_cansleep(pcie->reset_gpio, 0);
+
}
static int plda_pcie_is_link_up(struct plda_pcie *pcie)
@@ -909,9 +899,9 @@ static int plda_pcie_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, pcie);
- plda_pinctrl_init(pcie);
+ ret = plda_gpio_init(pcie);
if (ret) {
- dev_err(&pdev->dev, "Init pinctrl failed\n");
+ dev_err(&pdev->dev, "Init gpio failed\n");
return ret;
}
@@ -979,6 +969,9 @@ exit:
return ret;
release:
+ if (pcie->power_gpio)
+ gpiod_set_value_cansleep(pcie->power_gpio, 0);
+
plda_clk_rst_deinit(pcie);
pm_runtime_put_sync(&pdev->dev);