Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) .TH CPUPOWER\-SET "1" "22/02/2011" "" "cpupower Manual"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) .SH NAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) cpupower\-set \- Set processor power related kernel or hardware configurations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) .SH SYNOPSIS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) .ft B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) .B cpupower set [ \-b VAL ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) .SH DESCRIPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) \fBcpupower set \fP sets kernel configurations or directly accesses hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) registers affecting processor power saving policies.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Some options are platform wide, some affect single cores. By default values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) are applied on all cores. How to modify single core configurations is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) described in the cpupower(1) manpage in the \-\-cpu option section. Whether an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) option affects the whole system or can be applied to individual cores is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) described in the Options sections.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Use \fBcpupower info \fP to read out current settings and whether they are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) supported on the system at all.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .SH Options
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .PP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) \-\-perf-bias, \-b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .RS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Sets a register on supported Intel processore which allows software to convey
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) its policy for the relative importance of performance versus energy savings to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) the  processor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) The range of valid numbers is 0-15, where 0 is maximum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) performance and 15 is maximum energy efficiency.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) The processor uses this information in model-specific ways
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) when it must select trade-offs between performance and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) energy efficiency.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) This policy hint does not supersede Processor Performance states
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) (P-states) or CPU Idle power states (C-states), but allows
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) software to have influence where it would otherwise be unable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) to express a preference.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) For example, this setting may tell the hardware how
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) aggressively or conservatively to control frequency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) in the "turbo range" above the explicitly OS-controlled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) P-state frequency range.  It may also tell the hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) how aggressively it should enter the OS requested C-states.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) This option can be applied to individual cores only via the \-\-cpu option,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) cpupower(1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) Setting the performance bias value on one CPU can modify the setting on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) related CPUs as well (for example all CPUs on one socket), because of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) hardware restrictions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Use \fBcpupower -c all info -b\fP to verify.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) This options needs the msr kernel driver (CONFIG_X86_MSR) loaded.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .RE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .SH "SEE ALSO"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) cpupower-info(1), cpupower-monitor(1), powertop(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .PP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .SH AUTHORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .nf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) \-\-perf\-bias parts written by Len Brown <len.brown@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) Thomas Renninger <trenn@suse.de>