^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * intel_pt_pkt_decoder.h: Intel Processor Trace support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2013-2014, Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef INCLUDE__INTEL_PT_PKT_DECODER_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define INCLUDE__INTEL_PT_PKT_DECODER_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <stdint.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define INTEL_PT_PKT_DESC_MAX 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define INTEL_PT_NEED_MORE_BYTES -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define INTEL_PT_BAD_PACKET -2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define INTEL_PT_PSB_STR "\002\202\002\202\002\202\002\202" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) "\002\202\002\202\002\202\002\202"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define INTEL_PT_PSB_LEN 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define INTEL_PT_PKT_MAX_SZ 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) enum intel_pt_pkt_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) INTEL_PT_BAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) INTEL_PT_PAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) INTEL_PT_TNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) INTEL_PT_TIP_PGD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) INTEL_PT_TIP_PGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) INTEL_PT_TSC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) INTEL_PT_TMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) INTEL_PT_MODE_EXEC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) INTEL_PT_MODE_TSX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) INTEL_PT_MTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) INTEL_PT_TIP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) INTEL_PT_FUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) INTEL_PT_CYC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) INTEL_PT_VMCS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) INTEL_PT_PSB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) INTEL_PT_PSBEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) INTEL_PT_CBR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) INTEL_PT_TRACESTOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) INTEL_PT_PIP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) INTEL_PT_OVF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) INTEL_PT_MNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) INTEL_PT_PTWRITE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) INTEL_PT_PTWRITE_IP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) INTEL_PT_EXSTOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) INTEL_PT_EXSTOP_IP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) INTEL_PT_MWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) INTEL_PT_PWRE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) INTEL_PT_PWRX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) INTEL_PT_BBP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) INTEL_PT_BIP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) INTEL_PT_BEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) INTEL_PT_BEP_IP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct intel_pt_pkt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) enum intel_pt_pkt_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) uint64_t payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * Decoding of BIP packets conflicts with single-byte TNT packets. Since BIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * packets only occur in the context of a block (i.e. between BBP and BEP), that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * context must be recorded and passed to the packet decoder.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) enum intel_pt_pkt_ctx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) INTEL_PT_NO_CTX, /* BIP packets are invalid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) INTEL_PT_BLK_4_CTX, /* 4-byte BIP packets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) INTEL_PT_BLK_8_CTX, /* 8-byte BIP packets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) const char *intel_pt_pkt_name(enum intel_pt_pkt_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int intel_pt_get_packet(const unsigned char *buf, size_t len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct intel_pt_pkt *packet,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) enum intel_pt_pkt_ctx *ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) void intel_pt_upd_pkt_ctx(const struct intel_pt_pkt *packet,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) enum intel_pt_pkt_ctx *ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) int intel_pt_pkt_desc(const struct intel_pt_pkt *packet, char *buf, size_t len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #endif