Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Arm Statistical Profiling Extensions (SPE) support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright (c) 2017-2018, Arm Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #ifndef INCLUDE__ARM_SPE_PKT_DECODER_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define INCLUDE__ARM_SPE_PKT_DECODER_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <stdint.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define ARM_SPE_PKT_DESC_MAX		256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define ARM_SPE_NEED_MORE_BYTES		-1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define ARM_SPE_BAD_PACKET		-2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define ARM_SPE_PKT_MAX_SZ		16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) enum arm_spe_pkt_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	ARM_SPE_BAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	ARM_SPE_PAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	ARM_SPE_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	ARM_SPE_TIMESTAMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	ARM_SPE_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	ARM_SPE_COUNTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	ARM_SPE_CONTEXT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	ARM_SPE_OP_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	ARM_SPE_EVENTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	ARM_SPE_DATA_SOURCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct arm_spe_pkt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	enum arm_spe_pkt_type	type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	unsigned char		index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	uint64_t		payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define SPE_ADDR_PKT_HDR_INDEX_INS		(0x0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define SPE_ADDR_PKT_HDR_INDEX_BRANCH		(0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT	(0x2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS	(0x3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define SPE_ADDR_PKT_NS				BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define SPE_ADDR_PKT_CH				BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define SPE_ADDR_PKT_EL_OFFSET			(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define SPE_ADDR_PKT_EL_MASK			(0x3 << SPE_ADDR_PKT_EL_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define SPE_ADDR_PKT_EL0			(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define SPE_ADDR_PKT_EL1			(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define SPE_ADDR_PKT_EL2			(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define SPE_ADDR_PKT_EL3			(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) const char *arm_spe_pkt_name(enum arm_spe_pkt_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int arm_spe_get_packet(const unsigned char *buf, size_t len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 		       struct arm_spe_pkt *packet);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, size_t len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #endif