^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arm_spe_decoder.c: ARM SPE support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef _GNU_SOURCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define _GNU_SOURCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <inttypes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <stdbool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <stdint.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <stdlib.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/compiler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/zalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "../auxtrace.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "../debug.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "../util.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "arm-spe-decoder.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #ifndef BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BIT(n) (1UL << (n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static u64 arm_spe_calc_ip(int index, u64 payload)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u8 *addr = (u8 *)&payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int ns, el;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* Instruction virtual address or Branch target address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) if (index == SPE_ADDR_PKT_HDR_INDEX_INS ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) index == SPE_ADDR_PKT_HDR_INDEX_BRANCH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) ns = addr[7] & SPE_ADDR_PKT_NS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) el = (addr[7] & SPE_ADDR_PKT_EL_MASK) >> SPE_ADDR_PKT_EL_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* Fill highest byte for EL1 or EL2 (VHE) mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (ns && (el == SPE_ADDR_PKT_EL1 || el == SPE_ADDR_PKT_EL2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) addr[7] = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* Clean highest byte for other cases */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) addr[7] = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* Data access virtual address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) } else if (index == SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* Fill highest byte if bits [48..55] is 0xff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (addr[6] == 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) addr[7] = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* Otherwise, cleanup tags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) addr[7] = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* Data access physical address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) } else if (index == SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* Cleanup byte 7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) addr[7] = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) pr_err("unsupported address packet index: 0x%x\n", index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct arm_spe_decoder *arm_spe_decoder_new(struct arm_spe_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct arm_spe_decoder *decoder;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (!params->get_trace)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) decoder = zalloc(sizeof(struct arm_spe_decoder));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (!decoder)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) decoder->get_trace = params->get_trace;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) decoder->data = params->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return decoder;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) void arm_spe_decoder_free(struct arm_spe_decoder *decoder)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) free(decoder);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int arm_spe_get_data(struct arm_spe_decoder *decoder)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct arm_spe_buffer buffer = { .buf = 0, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) pr_debug("Getting more data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ret = decoder->get_trace(&buffer, decoder->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) decoder->buf = buffer.buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) decoder->len = buffer.len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (!decoder->len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) pr_debug("No more data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return decoder->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static int arm_spe_get_next_packet(struct arm_spe_decoder *decoder)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (!decoder->len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ret = arm_spe_get_data(decoder);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Failed to read out trace data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (ret <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ret = arm_spe_get_packet(decoder->buf, decoder->len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) &decoder->packet);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (ret <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /* Move forward for 1 byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) decoder->buf += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) decoder->len -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return -EBADMSG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) decoder->buf += ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) decoder->len -= ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) } while (decoder->packet.type == ARM_SPE_PAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static int arm_spe_read_record(struct arm_spe_decoder *decoder)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u64 payload, ip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) memset(&decoder->record, 0x0, sizeof(decoder->record));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) while (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) err = arm_spe_get_next_packet(decoder);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (err <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) idx = decoder->packet.index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) payload = decoder->packet.payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) switch (decoder->packet.type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) case ARM_SPE_TIMESTAMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) decoder->record.timestamp = payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) case ARM_SPE_END:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) case ARM_SPE_ADDRESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ip = arm_spe_calc_ip(idx, payload);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (idx == SPE_ADDR_PKT_HDR_INDEX_INS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) decoder->record.from_ip = ip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) else if (idx == SPE_ADDR_PKT_HDR_INDEX_BRANCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) decoder->record.to_ip = ip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) case ARM_SPE_COUNTER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) case ARM_SPE_CONTEXT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) case ARM_SPE_OP_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) case ARM_SPE_EVENTS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (payload & BIT(EV_L1D_REFILL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) decoder->record.type |= ARM_SPE_L1D_MISS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (payload & BIT(EV_L1D_ACCESS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) decoder->record.type |= ARM_SPE_L1D_ACCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (payload & BIT(EV_TLB_WALK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) decoder->record.type |= ARM_SPE_TLB_MISS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (payload & BIT(EV_TLB_ACCESS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) decoder->record.type |= ARM_SPE_TLB_ACCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if ((idx == 2 || idx == 4 || idx == 8) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) (payload & BIT(EV_LLC_MISS)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) decoder->record.type |= ARM_SPE_LLC_MISS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if ((idx == 2 || idx == 4 || idx == 8) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) (payload & BIT(EV_LLC_ACCESS)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) decoder->record.type |= ARM_SPE_LLC_ACCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if ((idx == 2 || idx == 4 || idx == 8) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) (payload & BIT(EV_REMOTE_ACCESS)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) decoder->record.type |= ARM_SPE_REMOTE_ACCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (payload & BIT(EV_MISPRED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) decoder->record.type |= ARM_SPE_BRANCH_MISS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) case ARM_SPE_DATA_SOURCE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) case ARM_SPE_BAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) case ARM_SPE_PAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) pr_err("Get packet error!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int arm_spe_decode(struct arm_spe_decoder *decoder)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) return arm_spe_read_record(decoder);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }