^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 2016 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Ramesh Babu K V <ramesh.babu@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Vaibhav Agarwal <vaibhav.agarwal@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Jerome Anand <jerome.anand@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Permission is hereby granted, free of charge, to any person obtaining
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * a copy of this software and associated documentation files
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * (the "Software"), to deal in the Software without restriction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * including without limitation the rights to use, copy, modify, merge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * publish, distribute, sublicense, and/or sell copies of the Software,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * and to permit persons to whom the Software is furnished to do so,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * subject to the following conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * The above copyright notice and this permission notice (including the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * next paragraph) shall be included in all copies or substantial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * portions of the Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #ifndef _INTEL_HDMI_AUDIO_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define _INTEL_HDMI_AUDIO_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include "intel_hdmi_lpe_audio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define MAX_PB_STREAMS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define MAX_CAP_STREAMS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define BYTES_PER_WORD 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define INTEL_HAD "HdmiLpeAudio"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * CEA speaker placement:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * FL FLC FC FRC FR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * LFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * RL RLC RC RRC RR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * corresponds to CEA RL/RR; The SMPTE channel _assignment_ C/LFE is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * swapped to CEA LFE/FC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) enum cea_speaker_placement {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) FL = (1 << 0), /* Front Left */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) FC = (1 << 1), /* Front Center */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) FR = (1 << 2), /* Front Right */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) FLC = (1 << 3), /* Front Left Center */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) FRC = (1 << 4), /* Front Right Center */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) RL = (1 << 5), /* Rear Left */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) RC = (1 << 6), /* Rear Center */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) RR = (1 << 7), /* Rear Right */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) RLC = (1 << 8), /* Rear Left Center */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) RRC = (1 << 9), /* Rear Right Center */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) LFE = (1 << 10), /* Low Frequency Effect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct cea_channel_speaker_allocation {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int ca_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) int speakers[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* derived values, just for convenience */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int spk_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct channel_map_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned char map; /* ALSA API channel map position */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned char cea_slot; /* CEA slot value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int spk_mask; /* speaker position bit mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct pcm_stream_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct snd_pcm_substream *substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) int substream_refcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * struct snd_intelhad - intelhad driver structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * @card: ptr to hold card details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * @connected: the monitor connection status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * @stream_info: stream information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * @eld: holds ELD info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * @curr_buf: pointer to hold current active ring buf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * @valid_buf_cnt: ring buffer count for stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * @had_spinlock: driver lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * @aes_bits: IEC958 status bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * @buff_done: id of current buffer done intr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @dev: platoform device handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * @chmap: holds channel map info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct snd_intelhad {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct snd_intelhad_card *card_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) bool connected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct pcm_stream_info stream_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) unsigned char eld[HDMI_MAX_ELD_BYTES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) bool dp_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) unsigned int aes_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) spinlock_t had_spinlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct snd_pcm_chmap *chmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int tmds_clock_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int link_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int port; /* fixed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int pipe; /* can change dynamically */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* ring buffer (BD) position index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) unsigned int bd_head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* PCM buffer position indices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) unsigned int pcmbuf_head; /* being processed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned int pcmbuf_filled; /* to be filled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) unsigned int num_bds; /* number of BDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned int period_bytes; /* PCM period size in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* internal stuff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) union aud_cfg aud_config; /* AUD_CONFIG reg value cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct work_struct hdmi_audio_wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct mutex mutex; /* for protecting chmap and eld */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) bool need_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct snd_jack *jack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct snd_intelhad_card {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* internal stuff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) void __iomem *mmio_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) int num_pipes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) int num_ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct snd_intelhad pcm_ctx[3]; /* one for each port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #endif /* _INTEL_HDMI_AUDIO_ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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