Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // Socionext UniPhier AIO DMA driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) // Copyright (c) 2016-2018 Socionext Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include "aio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) static struct snd_pcm_hardware uniphier_aiodma_hw = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	.info = SNDRV_PCM_INFO_MMAP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 		SNDRV_PCM_INFO_MMAP_VALID |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 		SNDRV_PCM_INFO_INTERLEAVED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	.period_bytes_min = 256,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	.period_bytes_max = 4096,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	.periods_min      = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	.periods_max      = 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	.buffer_bytes_max = 128 * 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static void aiodma_pcm_irq(struct uniphier_aio_sub *sub)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	struct snd_pcm_runtime *runtime = sub->substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	int bytes = runtime->period_size *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		runtime->channels * samples_to_bytes(runtime, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	spin_lock(&sub->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	ret = aiodma_rb_set_threshold(sub, runtime->dma_bytes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 				      sub->threshold + bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		sub->threshold += bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	aiodma_rb_sync(sub, runtime->dma_addr, runtime->dma_bytes, bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	aiodma_rb_clear_irq(sub);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	spin_unlock(&sub->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	snd_pcm_period_elapsed(sub->substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static void aiodma_compr_irq(struct uniphier_aio_sub *sub)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct snd_compr_runtime *runtime = sub->cstream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	int bytes = runtime->fragment_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	spin_lock(&sub->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	ret = aiodma_rb_set_threshold(sub, sub->compr_bytes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 				      sub->threshold + bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		sub->threshold += bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	aiodma_rb_sync(sub, sub->compr_addr, sub->compr_bytes, bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	aiodma_rb_clear_irq(sub);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	spin_unlock(&sub->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	snd_compr_fragment_elapsed(sub->cstream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) static irqreturn_t aiodma_irq(int irq, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct platform_device *pdev = p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	struct uniphier_aio_chip *chip = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	irqreturn_t ret = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	for (i = 0; i < chip->num_aios; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		struct uniphier_aio *aio = &chip->aios[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		for (j = 0; j < ARRAY_SIZE(aio->sub); j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 			struct uniphier_aio_sub *sub = &aio->sub[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			/* Skip channel that does not trigger */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 			if (!sub->running || !aiodma_rb_is_irq(sub))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 			if (sub->substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 				aiodma_pcm_irq(sub);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 			if (sub->cstream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 				aiodma_compr_irq(sub);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 			ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) static int uniphier_aiodma_open(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 				struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	snd_soc_set_runtime_hwparams(substream, &uniphier_aiodma_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	return snd_pcm_hw_constraint_step(runtime, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int uniphier_aiodma_prepare(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 				   struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	struct uniphier_aio *aio = uniphier_priv(asoc_rtd_to_cpu(rtd, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	int bytes = runtime->period_size *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		runtime->channels * samples_to_bytes(runtime, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	ret = aiodma_ch_set_param(sub);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	spin_lock_irqsave(&sub->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	ret = aiodma_rb_set_buffer(sub, runtime->dma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 				   runtime->dma_addr + runtime->dma_bytes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 				   bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	spin_unlock_irqrestore(&sub->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int uniphier_aiodma_trigger(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 				   struct snd_pcm_substream *substream, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	struct uniphier_aio *aio = uniphier_priv(asoc_rtd_to_cpu(rtd, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	struct device *dev = &aio->chip->pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	int bytes = runtime->period_size *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		runtime->channels * samples_to_bytes(runtime, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	spin_lock_irqsave(&sub->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	case SNDRV_PCM_TRIGGER_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		aiodma_rb_sync(sub, runtime->dma_addr, runtime->dma_bytes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			       bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		aiodma_ch_set_enable(sub, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		sub->running = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	case SNDRV_PCM_TRIGGER_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		sub->running = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		aiodma_ch_set_enable(sub, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		dev_warn(dev, "Unknown trigger(%d) ignored\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	spin_unlock_irqrestore(&sub->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static snd_pcm_uframes_t uniphier_aiodma_pointer(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 					struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 					struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	struct uniphier_aio *aio = uniphier_priv(asoc_rtd_to_cpu(rtd, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	int bytes = runtime->period_size *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		runtime->channels * samples_to_bytes(runtime, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	snd_pcm_uframes_t pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	spin_lock_irqsave(&sub->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	aiodma_rb_sync(sub, runtime->dma_addr, runtime->dma_bytes, bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	if (sub->swm->dir == PORT_DIR_OUTPUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		pos = bytes_to_frames(runtime, sub->rd_offs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		pos = bytes_to_frames(runtime, sub->wr_offs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	spin_unlock_irqrestore(&sub->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	return pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int uniphier_aiodma_mmap(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 				struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 				struct vm_area_struct *vma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	return remap_pfn_range(vma, vma->vm_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			       substream->runtime->dma_addr >> PAGE_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			       vma->vm_end - vma->vm_start, vma->vm_page_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static int uniphier_aiodma_new(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			       struct snd_soc_pcm_runtime *rtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	struct device *dev = rtd->card->snd_card->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	struct snd_pcm *pcm = rtd->pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(33));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	snd_pcm_set_managed_buffer_all(pcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		SNDRV_DMA_TYPE_DEV, dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		uniphier_aiodma_hw.buffer_bytes_max,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		uniphier_aiodma_hw.buffer_bytes_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static const struct snd_soc_component_driver uniphier_soc_platform = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	.open		= uniphier_aiodma_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	.prepare	= uniphier_aiodma_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	.trigger	= uniphier_aiodma_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	.pointer	= uniphier_aiodma_pointer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	.mmap		= uniphier_aiodma_mmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	.pcm_construct	= uniphier_aiodma_new,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	.compress_ops	= &uniphier_aio_compress_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static const struct regmap_config aiodma_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	.reg_bits      = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	.reg_stride    = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	.val_bits      = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	.max_register  = 0x7fffc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	.cache_type    = REGCACHE_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)  * uniphier_aiodma_soc_register_platform - register the AIO DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)  * @pdev: the platform device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)  * Register and setup the DMA of AIO to transfer the sound data to device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)  * This function need to call once at driver startup and need NOT to call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)  * unregister function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)  * Return: Zero if successful, otherwise a negative value on error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) int uniphier_aiodma_soc_register_platform(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	struct uniphier_aio_chip *chip = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	void __iomem *preg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	int irq, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	preg = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	if (IS_ERR(preg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		return PTR_ERR(preg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	chip->regmap = devm_regmap_init_mmio(dev, preg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 					     &aiodma_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	if (IS_ERR(chip->regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		return PTR_ERR(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	ret = devm_request_irq(dev, irq, aiodma_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 			       IRQF_SHARED, dev_name(dev), pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	return devm_snd_soc_register_component(dev, &uniphier_soc_platform,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 					       NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) EXPORT_SYMBOL_GPL(uniphier_aiodma_soc_register_platform);