^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) config SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) tristate "SoC Audio for the Tegra System-on-Chip"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) depends on COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) depends on RESET_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) select REGMAP_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) select SND_SOC_GENERIC_DMAENGINE_PCM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Say Y or M here if you want support for SoC audio on Tegra.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) config SND_SOC_TEGRA20_AC97
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) tristate "Tegra20 AC97 interface"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) depends on SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) select SND_SOC_AC97_BUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) select SND_SOC_TEGRA20_DAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Say Y or M if you want to add support for codecs attached to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Tegra20 AC97 interface. You will also need to select the individual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) machine drivers to support below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) config SND_SOC_TEGRA20_DAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) tristate "Tegra20 DAS module"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) depends on SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Say Y or M if you want to add support for the Tegra20 DAS module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) You will also need to select the individual machine drivers to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) support below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) config SND_SOC_TEGRA20_I2S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) tristate "Tegra20 I2S interface"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) depends on SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) select SND_SOC_TEGRA20_DAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Say Y or M if you want to add support for codecs attached to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) Tegra20 I2S interface. You will also need to select the individual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) machine drivers to support below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) config SND_SOC_TEGRA20_SPDIF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) tristate "Tegra20 SPDIF interface"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) depends on SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) default m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) Say Y or M if you want to add support for the Tegra20 SPDIF interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) You will also need to select the individual machine drivers to support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) config SND_SOC_TEGRA30_AHUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) tristate "Tegra30 AHUB module"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) depends on SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) Say Y or M if you want to add support for the Tegra30 AHUB module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) You will also need to select the individual machine drivers to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) support below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) config SND_SOC_TEGRA30_I2S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) tristate "Tegra30 I2S interface"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) depends on SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) select SND_SOC_TEGRA30_AHUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) Say Y or M if you want to add support for codecs attached to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) Tegra30 I2S interface. You will also need to select the individual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) machine drivers to support below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) config SND_SOC_TEGRA210_AHUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) tristate "Tegra210 AHUB module"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) depends on SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) Config to enable Audio Hub (AHUB) module, which comprises of a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) switch called Audio Crossbar (AXBAR) used to configure or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) the audio routing path between various HW accelerators present in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) AHUB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) Say Y or M if you want to add support for Tegra210 AHUB module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) config SND_SOC_TEGRA210_DMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) tristate "Tegra210 DMIC module"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) depends on SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) Config to enable the Digital MIC (DMIC) controller which is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) to interface with Pulse Density Modulation (PDM) input devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) The DMIC controller implements a converter to convert PDM signals
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) to Pulse Code Modulation (PCM) signals. This can be viewed as a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) PDM receiver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) Say Y or M if you want to add support for Tegra210 DMIC module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) config SND_SOC_TEGRA210_I2S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) tristate "Tegra210 I2S module"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) depends on SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) Config to enable the Inter-IC Sound (I2S) Controller which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) implements full-duplex and bidirectional and single direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) point-to-point serial interfaces. It can interface with I2S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) compatible devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) Say Y or M if you want to add support for Tegra210 I2S module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) config SND_SOC_TEGRA186_DSPK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) tristate "Tegra186 DSPK module"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) depends on SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) Config to enable the Digital Speaker Controller (DSPK) which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) converts the multi-bit Pulse Code Modulation (PCM) audio input to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) oversampled 1-bit Pulse Density Modulation (PDM) output. From the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) signal flow perspective DSPK can be viewed as a PDM transmitter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) that up-samples the input to the desired sampling rate by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) interpolation and then converts the oversampled PCM input to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) the desired 1-bit output via Delta Sigma Modulation (DSM).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) Say Y or M if you want to add support for Tegra186 DSPK module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) config SND_SOC_TEGRA210_ADMAIF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) tristate "Tegra210 ADMAIF module"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) depends on SND_SOC_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) Config to enable ADMAIF which is the interface between ADMA and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) Audio Hub (AHUB). Each ADMA channel that sends/receives data to/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) from AHUB must interface through an ADMAIF channel. ADMA channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) sending data to AHUB pairs with an ADMAIF Tx channel, where as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ADMA channel receiving data from AHUB pairs with an ADMAIF Rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) channel. Buffer size is configurable for each ADMAIIF channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) Say Y or M if you want to add support for Tegra210 ADMAIF module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) config SND_SOC_TEGRA_RT5640
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) tristate "SoC Audio support for Tegra boards using an RT5640 codec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) depends on SND_SOC_TEGRA && I2C && GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) select SND_SOC_RT5640
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) Say Y or M here if you want to add support for SoC audio on Tegra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) boards using the RT5640 codec, such as Dalmore.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) config SND_SOC_TEGRA_WM8753
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) tristate "SoC Audio support for Tegra boards using a WM8753 codec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) depends on SND_SOC_TEGRA && I2C && GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) select SND_SOC_WM8753
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) Say Y or M here if you want to add support for SoC audio on Tegra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) boards using the WM8753 codec, such as Whistler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) config SND_SOC_TEGRA_WM8903
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) tristate "SoC Audio support for Tegra boards using a WM8903 codec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) depends on SND_SOC_TEGRA && I2C && GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) select SND_SOC_WM8903
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) Say Y or M here if you want to add support for SoC audio on Tegra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) boards using the WM8093 codec. Currently, the supported boards are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) Harmony, Ventana, Seaboard, Kaen, and Aebl.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) config SND_SOC_TEGRA_WM9712
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) tristate "SoC Audio support for Tegra boards using a WM9712 codec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) depends on SND_SOC_TEGRA && GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) select SND_SOC_TEGRA20_AC97
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) select SND_SOC_WM9712
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) Say Y or M here if you want to add support for SoC audio on Tegra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) boards using the WM9712 (or compatible) codec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) config SND_SOC_TEGRA_TRIMSLICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) tristate "SoC Audio support for TrimSlice board"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) depends on SND_SOC_TEGRA && I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) select SND_SOC_TLV320AIC23_I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) Say Y or M here if you want to add support for SoC audio on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) TrimSlice platform.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) config SND_SOC_TEGRA_ALC5632
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) tristate "SoC Audio support for Tegra boards using an ALC5632 codec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) depends on SND_SOC_TEGRA && I2C && GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) select SND_SOC_ALC5632
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) Say Y or M here if you want to add support for SoC audio on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) Toshiba AC100 netbook.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) config SND_SOC_TEGRA_MAX98090
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) tristate "SoC Audio support for Tegra boards using a MAX98090 codec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) depends on SND_SOC_TEGRA && I2C && GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) select SND_SOC_MAX98090
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) Say Y or M here if you want to add support for SoC audio on Tegra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) boards using the MAX98090 codec, such as Venice2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) config SND_SOC_TEGRA_RT5677
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) tristate "SoC Audio support for Tegra boards using a RT5677 codec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) depends on SND_SOC_TEGRA && I2C && GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) select SND_SOC_RT5677
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) Say Y or M here if you want to add support for SoC audio on Tegra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) boards using the RT5677 codec, such as Ryu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) config SND_SOC_TEGRA_SGTL5000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) tristate "SoC Audio support for Tegra boards using a SGTL5000 codec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) depends on SND_SOC_TEGRA && I2C && GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) select SND_SOC_SGTL5000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) Say Y or M here if you want to add support for SoC audio on Tegra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) boards using the SGTL5000 codec, such as Apalis T30, Apalis TK1 or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) Colibri T30.
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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