Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #ifndef __SPRD_PCM_DMA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) #define __SPRD_PCM_DMA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #define DRV_NAME		"sprd_pcm_dma"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define SPRD_PCM_CHANNEL_MAX	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) extern const struct snd_compress_ops sprd_platform_compress_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) struct sprd_pcm_dma_params {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	dma_addr_t dev_phys[SPRD_PCM_CHANNEL_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	u32 datawidth[SPRD_PCM_CHANNEL_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	u32 fragment_len[SPRD_PCM_CHANNEL_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	const char *chan_name[SPRD_PCM_CHANNEL_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct sprd_compr_playinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	int total_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	int current_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	int total_data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	int current_data_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct sprd_compr_params {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	u32 direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	u32 rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	u32 sample_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	u32 channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	u32 format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	u32 period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	u32 periods;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	u32 info_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	u32 info_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct sprd_compr_callback {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	void (*drain_notify)(void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	void *drain_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct sprd_compr_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	int (*open)(int str_id, struct sprd_compr_callback *cb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	int (*close)(int str_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	int (*start)(int str_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	int (*stop)(int str_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	int (*pause)(int str_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	int (*pause_release)(int str_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	int (*drain)(int received_total);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	int (*set_params)(int str_id, struct sprd_compr_params *params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct sprd_compr_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	struct sprd_compr_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	struct sprd_pcm_dma_params *dma_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif /* __SPRD_PCM_DMA_H */