^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #ifndef __SPRD_MCDT_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define __SPRD_MCDT_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) enum sprd_mcdt_channel_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) SPRD_MCDT_DAC_CHAN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) SPRD_MCDT_ADC_CHAN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) SPRD_MCDT_UNKNOWN_CHAN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) enum sprd_mcdt_dma_chan {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) SPRD_MCDT_DMA_CH0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) SPRD_MCDT_DMA_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) SPRD_MCDT_DMA_CH2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) SPRD_MCDT_DMA_CH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) SPRD_MCDT_DMA_CH4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct sprd_mcdt_chan_callback {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) void (*notify)(void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) void *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * struct sprd_mcdt_chan - this struct represents a single channel instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * @mcdt: the mcdt controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * @id: channel id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * @fifo_phys: channel fifo physical address which is used for DMA transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * @type: channel type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * @cb: channel fifo interrupt's callback interface to notify the fifo events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * @dma_enable: indicate if use DMA mode to transfer data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * @int_enable: indicate if use interrupt mode to notify users to read or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * write data manually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * @list: used to link into the global list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * Note: users should not modify any members of this structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct sprd_mcdt_chan {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct sprd_mcdt_dev *mcdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u8 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) unsigned long fifo_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) enum sprd_mcdt_channel_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) enum sprd_mcdt_dma_chan dma_chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct sprd_mcdt_chan_callback *cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) bool dma_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) bool int_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #if IS_ENABLED(CONFIG_SND_SOC_SPRD_MCDT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct sprd_mcdt_chan *sprd_mcdt_request_chan(u8 channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) enum sprd_mcdt_channel_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) void sprd_mcdt_free_chan(struct sprd_mcdt_chan *chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int sprd_mcdt_chan_write(struct sprd_mcdt_chan *chan, char *tx_buf, u32 size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) int sprd_mcdt_chan_read(struct sprd_mcdt_chan *chan, char *rx_buf, u32 size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int sprd_mcdt_chan_int_enable(struct sprd_mcdt_chan *chan, u32 water_mark,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct sprd_mcdt_chan_callback *cb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) void sprd_mcdt_chan_int_disable(struct sprd_mcdt_chan *chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int sprd_mcdt_chan_dma_enable(struct sprd_mcdt_chan *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) enum sprd_mcdt_dma_chan dma_chan, u32 water_mark);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) void sprd_mcdt_chan_dma_disable(struct sprd_mcdt_chan *chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct sprd_mcdt_chan *sprd_mcdt_request_chan(u8 channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) enum sprd_mcdt_channel_type type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) void sprd_mcdt_free_chan(struct sprd_mcdt_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int sprd_mcdt_chan_write(struct sprd_mcdt_chan *chan, char *tx_buf, u32 size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) int sprd_mcdt_chan_read(struct sprd_mcdt_chan *chan, char *rx_buf, u32 size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int sprd_mcdt_chan_int_enable(struct sprd_mcdt_chan *chan, u32 water_mark,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct sprd_mcdt_chan_callback *cb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) void sprd_mcdt_chan_int_disable(struct sprd_mcdt_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int sprd_mcdt_chan_dma_enable(struct sprd_mcdt_chan *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) enum sprd_mcdt_dma_chan dma_chan, u32 water_mark)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) void sprd_mcdt_chan_dma_disable(struct sprd_mcdt_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #endif /* __SPRD_MCDT_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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