Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) // This file is provided under a dual BSD/GPLv2 license.  When using or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) // redistributing this file, you may do so under either license.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) // Copyright(c) 2018 Intel Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) //	    Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) //	    Rander Wang <rander.wang@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) //          Keyon Jie <yang.jie@linux.intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  * Hardware interface for generic Intel audio DSP HDA IP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <sound/hdaudio_ext.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "../ops.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "hda.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static int hda_dsp_trace_prepare(struct snd_sof_dev *sdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	struct hdac_ext_stream *stream = hda->dtrace_stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	struct hdac_stream *hstream = &stream->hstream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	struct snd_dma_buffer *dmab = &sdev->dmatb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	hstream->period_bytes = 0;/* initialize period_bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	hstream->bufsize = sdev->dmatb.bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	ret = hda_dsp_stream_hw_params(sdev, stream, dmab, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		dev_err(sdev->dev, "error: hdac prepare failed: %x\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int hda_dsp_trace_init(struct snd_sof_dev *sdev, u32 *stream_tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	hda->dtrace_stream = hda_dsp_stream_get(sdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 						SNDRV_PCM_STREAM_CAPTURE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	if (!hda->dtrace_stream) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		dev_err(sdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 			"error: no available capture stream for DMA trace\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	*stream_tag = hda->dtrace_stream->hstream.stream_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	 * initialize capture stream, set BDL address and return corresponding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	 * stream tag which will be sent to the firmware by IPC message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	ret = hda_dsp_trace_prepare(sdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 		dev_err(sdev->dev, "error: hdac trace init failed: %x\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 		hda_dsp_stream_put(sdev, SNDRV_PCM_STREAM_CAPTURE, *stream_tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 		hda->dtrace_stream = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 		*stream_tag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int hda_dsp_trace_release(struct snd_sof_dev *sdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	struct hdac_stream *hstream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	if (hda->dtrace_stream) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 		hstream = &hda->dtrace_stream->hstream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 		hda_dsp_stream_put(sdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 				   SNDRV_PCM_STREAM_CAPTURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 				   hstream->stream_tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 		hda->dtrace_stream = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 	dev_dbg(sdev->dev, "DMA trace stream is not opened!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 	return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int hda_dsp_trace_trigger(struct snd_sof_dev *sdev, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 	return hda_dsp_stream_trigger(sdev, hda->dtrace_stream, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }