Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) // This file is provided under a dual BSD/GPLv2 license.  When using or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) // redistributing this file, you may do so under either license.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) // Copyright(c) 2018 Intel Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) // Authors: Keyon Jie <yang.jie@linux.intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <sound/hdaudio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "../sof-priv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "hda.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "../../codecs/hdac_hda.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define sof_hda_ext_ops	snd_soc_hdac_hda_get_ops()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define sof_hda_ext_ops	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * This can be used for both with/without hda link support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) void sof_hda_bus_init(struct hdac_bus *bus, struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	snd_hdac_ext_bus_init(bus, dev, NULL, sof_hda_ext_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #else /* CONFIG_SND_SOC_SOF_HDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	memset(bus, 0, sizeof(*bus));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	bus->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	INIT_LIST_HEAD(&bus->stream_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	bus->irq = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	 * There is only one HDA bus atm. keep the index as 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	 * Need to fix when there are more than one HDA bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	bus->idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	spin_lock_init(&bus->reg_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif /* CONFIG_SND_SOC_SOF_HDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }