^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright (c) 2009 Samsung Electronics Co. Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // Author: Jaswinder Singh <jassisinghbrar@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "../codecs/wm8580.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "i2s.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Default CFG switch settings to use this driver:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * SMDK6410: Set CFG1 1-3 Off, CFG2 1-4 On
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* SMDK has a 12MHZ crystal attached to WM8580 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define SMDK_WM8580_FREQ 12000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static int smdk_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned int pll_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int rfs, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) switch (params_width(params)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) case 16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* The Fvco for WM8580 PLLs must fall within [90,100]MHz.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * This criterion can't be met if we request PLL output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * as {8000x256, 64000x256, 11025x256}Hz.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * As a wayout, we rather change rfs to a minimum value that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * results in (params_rate(params) * rfs), and itself, acceptable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * to both - the CODEC and the CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) switch (params_rate(params)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) case 16000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) case 22050:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) case 32000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) case 44100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) case 48000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) case 88200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) case 96000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) rfs = 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) case 64000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) rfs = 384;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) case 8000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) case 11025:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) rfs = 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) pll_out = params_rate(params) * rfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* Set WM8580 to drive MCLK from its PLLA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) ret = snd_soc_dai_set_clkdiv(codec_dai, WM8580_MCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) WM8580_CLKSRC_PLLA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) ret = snd_soc_dai_set_pll(codec_dai, WM8580_PLLA, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) SMDK_WM8580_FREQ, pll_out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ret = snd_soc_dai_set_sysclk(codec_dai, WM8580_CLKSRC_PLLA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) pll_out, SND_SOC_CLOCK_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * SMDK WM8580 DAI operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static struct snd_soc_ops smdk_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .hw_params = smdk_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* SMDK Playback widgets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static const struct snd_soc_dapm_widget smdk_wm8580_dapm_widgets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) SND_SOC_DAPM_HP("Front", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) SND_SOC_DAPM_HP("Center+Sub", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) SND_SOC_DAPM_HP("Rear", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) SND_SOC_DAPM_MIC("MicIn", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) SND_SOC_DAPM_LINE("LineIn", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* SMDK-PAIFTX connections */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static const struct snd_soc_dapm_route smdk_wm8580_audio_map[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* MicIn feeds AINL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {"AINL", NULL, "MicIn"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* LineIn feeds AINL/R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {"AINL", NULL, "LineIn"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {"AINR", NULL, "LineIn"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* Front Left/Right are fed VOUT1L/R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {"Front", NULL, "VOUT1L"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {"Front", NULL, "VOUT1R"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Center/Sub are fed VOUT2L/R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {"Center+Sub", NULL, "VOUT2L"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {"Center+Sub", NULL, "VOUT2R"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* Rear Left/Right are fed VOUT3L/R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {"Rear", NULL, "VOUT3L"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {"Rear", NULL, "VOUT3R"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int smdk_wm8580_init_paiftx(struct snd_soc_pcm_runtime *rtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* Enabling the microphone requires the fitting of a 0R
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * resistor to connect the line from the microphone jack.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) snd_soc_dapm_disable_pin(&rtd->card->dapm, "MicIn");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) PRI_PLAYBACK = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) PRI_CAPTURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define SMDK_DAI_FMT (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) SND_SOC_DAIFMT_CBM_CFM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) SND_SOC_DAILINK_DEFS(paif_rx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.2")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) DAILINK_COMP_ARRAY(COMP_CODEC("wm8580.0-001b", "wm8580-hifi-playback")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) SND_SOC_DAILINK_DEFS(paif_tx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.2")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) DAILINK_COMP_ARRAY(COMP_CODEC("wm8580.0-001b", "wm8580-hifi-capture")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static struct snd_soc_dai_link smdk_dai[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) [PRI_PLAYBACK] = { /* Primary Playback i/f */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .name = "WM8580 PAIF RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .stream_name = "Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .dai_fmt = SMDK_DAI_FMT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .ops = &smdk_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) SND_SOC_DAILINK_REG(paif_rx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) [PRI_CAPTURE] = { /* Primary Capture i/f */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .name = "WM8580 PAIF TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .stream_name = "Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .dai_fmt = SMDK_DAI_FMT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .init = smdk_wm8580_init_paiftx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .ops = &smdk_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) SND_SOC_DAILINK_REG(paif_tx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static struct snd_soc_card smdk = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .name = "SMDK-I2S",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .dai_link = smdk_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .num_links = ARRAY_SIZE(smdk_dai),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .dapm_widgets = smdk_wm8580_dapm_widgets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .num_dapm_widgets = ARRAY_SIZE(smdk_wm8580_dapm_widgets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .dapm_routes = smdk_wm8580_audio_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .num_dapm_routes = ARRAY_SIZE(smdk_wm8580_audio_map),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static struct platform_device *smdk_snd_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static int __init smdk_audio_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) smdk_snd_device = platform_device_alloc("soc-audio", -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (!smdk_snd_device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) platform_set_drvdata(smdk_snd_device, &smdk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ret = platform_device_add(smdk_snd_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) platform_device_put(smdk_snd_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) module_init(smdk_audio_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static void __exit smdk_audio_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) platform_device_unregister(smdk_snd_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) module_exit(smdk_audio_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) MODULE_AUTHOR("Jaswinder Singh, jassisinghbrar@gmail.com");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) MODULE_DESCRIPTION("ALSA SoC SMDK WM8580");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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