^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Bells audio support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright 2012 Wolfson Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <sound/soc-dapm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <sound/jack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "../codecs/wm5102.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "../codecs/wm9081.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* BCLK2 is fixed at this currently */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define BCLK2_RATE (64 * 8000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Expect a 24.576MHz crystal if one is fitted (the driver will function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * if this is not fitted).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MCLK_RATE 24576000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SYS_AUDIO_RATE 44100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SYS_MCLK_RATE (SYS_AUDIO_RATE * 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DAI_AP_DSP 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define DAI_DSP_CODEC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DAI_CODEC_CP 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define DAI_CODEC_SUB 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct bells_drvdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) int sysclk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int asyncclk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static struct bells_drvdata wm2200_drvdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .sysclk_rate = 22579200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static struct bells_drvdata wm5102_drvdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .sysclk_rate = 45158400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .asyncclk_rate = 49152000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static struct bells_drvdata wm5110_drvdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .sysclk_rate = 135475200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .asyncclk_rate = 147456000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static int bells_set_bias_level(struct snd_soc_card *card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct snd_soc_dapm_context *dapm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) enum snd_soc_bias_level level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct snd_soc_pcm_runtime *rtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct snd_soc_dai *codec_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct snd_soc_component *component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct bells_drvdata *bells = card->drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) codec_dai = asoc_rtd_to_codec(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) component = codec_dai->component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (dapm->dev != codec_dai->dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) switch (level) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) case SND_SOC_BIAS_PREPARE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (dapm->bias_level != SND_SOC_BIAS_STANDBY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ret = snd_soc_component_set_pll(component, WM5102_FLL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ARIZONA_FLL_SRC_MCLK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MCLK_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) bells->sysclk_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) pr_err("Failed to start FLL: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (bells->asyncclk_rate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ret = snd_soc_component_set_pll(component, WM5102_FLL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ARIZONA_FLL_SRC_AIF2BCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) BCLK2_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) bells->asyncclk_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) pr_err("Failed to start FLL: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static int bells_set_bias_level_post(struct snd_soc_card *card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct snd_soc_dapm_context *dapm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) enum snd_soc_bias_level level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct snd_soc_pcm_runtime *rtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct snd_soc_dai *codec_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct snd_soc_component *component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct bells_drvdata *bells = card->drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) codec_dai = asoc_rtd_to_codec(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) component = codec_dai->component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (dapm->dev != codec_dai->dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) switch (level) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) case SND_SOC_BIAS_STANDBY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ret = snd_soc_component_set_pll(component, WM5102_FLL1, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) pr_err("Failed to stop FLL: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (bells->asyncclk_rate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ret = snd_soc_component_set_pll(component, WM5102_FLL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) pr_err("Failed to stop FLL: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) dapm->bias_level = level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static int bells_late_probe(struct snd_soc_card *card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct bells_drvdata *bells = card->drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct snd_soc_pcm_runtime *rtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct snd_soc_component *wm0010;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct snd_soc_component *component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct snd_soc_dai *aif1_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct snd_soc_dai *aif2_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct snd_soc_dai *aif3_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) struct snd_soc_dai *wm9081_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_AP_DSP]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) wm0010 = asoc_rtd_to_codec(rtd, 0)->component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) component = asoc_rtd_to_codec(rtd, 0)->component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) aif1_dai = asoc_rtd_to_codec(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_SYSCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ARIZONA_CLK_SRC_FLL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) bells->sysclk_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) SND_SOC_CLOCK_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) dev_err(component->dev, "Failed to set SYSCLK: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ret = snd_soc_component_set_sysclk(wm0010, 0, 0, SYS_MCLK_RATE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) dev_err(wm0010->dev, "Failed to set WM0010 clock: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ret = snd_soc_dai_set_sysclk(aif1_dai, ARIZONA_CLK_SYSCLK, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) dev_err(aif1_dai->dev, "Failed to set AIF1 clock: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_OPCLK, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) SYS_MCLK_RATE, SND_SOC_CLOCK_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) dev_err(component->dev, "Failed to set OPCLK: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (card->num_rtd == DAI_CODEC_CP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_ASYNCCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) ARIZONA_CLK_SRC_FLL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) bells->asyncclk_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) SND_SOC_CLOCK_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) dev_err(component->dev, "Failed to set ASYNCCLK: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_CODEC_CP]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) aif2_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) ret = snd_soc_dai_set_sysclk(aif2_dai, ARIZONA_CLK_ASYNCCLK, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) dev_err(aif2_dai->dev, "Failed to set AIF2 clock: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (card->num_rtd == DAI_CODEC_SUB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_CODEC_SUB]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) aif3_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) wm9081_dai = asoc_rtd_to_codec(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ret = snd_soc_dai_set_sysclk(aif3_dai, ARIZONA_CLK_SYSCLK, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) dev_err(aif1_dai->dev, "Failed to set AIF1 clock: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) ret = snd_soc_component_set_sysclk(wm9081_dai->component, WM9081_SYSCLK_MCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 0, SYS_MCLK_RATE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) dev_err(wm9081_dai->dev, "Failed to set MCLK: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static const struct snd_soc_pcm_stream baseband_params = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .formats = SNDRV_PCM_FMTBIT_S32_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .rate_max = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .channels_min = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static const struct snd_soc_pcm_stream sub_params = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .formats = SNDRV_PCM_FMTBIT_S32_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .rate_min = SYS_AUDIO_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .rate_max = SYS_AUDIO_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .channels_min = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) SND_SOC_DAILINK_DEFS(wm2200_cpu_dsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) SND_SOC_DAILINK_DEFS(wm2200_dsp_codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) DAILINK_COMP_ARRAY(COMP_CODEC("wm2200.1-003a", "wm2200")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static struct snd_soc_dai_link bells_dai_wm2200[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .name = "CPU-DSP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .stream_name = "CPU-DSP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) | SND_SOC_DAIFMT_CBM_CFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) SND_SOC_DAILINK_REG(wm2200_cpu_dsp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .name = "DSP-CODEC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .stream_name = "DSP-CODEC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) | SND_SOC_DAIFMT_CBM_CFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .params = &sub_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) SND_SOC_DAILINK_REG(wm2200_dsp_codec),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) SND_SOC_DAILINK_DEFS(wm5102_cpu_dsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) SND_SOC_DAILINK_DEFS(wm5102_dsp_codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) DAILINK_COMP_ARRAY(COMP_CODEC("wm5102-codec", "wm5102-aif1")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) SND_SOC_DAILINK_DEFS(wm5102_baseband,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) DAILINK_COMP_ARRAY(COMP_CPU("wm5102-aif2")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) DAILINK_COMP_ARRAY(COMP_CODEC("wm1250-ev1.1-0027", "wm1250-ev1")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) SND_SOC_DAILINK_DEFS(wm5102_sub,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) DAILINK_COMP_ARRAY(COMP_CPU("wm5102-aif3")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) DAILINK_COMP_ARRAY(COMP_CODEC("wm9081.1-006c", "wm9081-hifi")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static struct snd_soc_dai_link bells_dai_wm5102[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .name = "CPU-DSP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .stream_name = "CPU-DSP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) | SND_SOC_DAIFMT_CBM_CFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) SND_SOC_DAILINK_REG(wm5102_cpu_dsp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .name = "DSP-CODEC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .stream_name = "DSP-CODEC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) | SND_SOC_DAIFMT_CBM_CFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) .params = &sub_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) SND_SOC_DAILINK_REG(wm5102_dsp_codec),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .name = "Baseband",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .stream_name = "Baseband",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) | SND_SOC_DAIFMT_CBM_CFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .params = &baseband_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) SND_SOC_DAILINK_REG(wm5102_baseband),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .name = "Sub",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .stream_name = "Sub",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) | SND_SOC_DAIFMT_CBS_CFS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .params = &sub_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) SND_SOC_DAILINK_REG(wm5102_sub),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) SND_SOC_DAILINK_DEFS(wm5110_cpu_dsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) SND_SOC_DAILINK_DEFS(wm5110_dsp_codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) DAILINK_COMP_ARRAY(COMP_CODEC("wm5110-codec", "wm5110-aif1")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) SND_SOC_DAILINK_DEFS(wm5110_baseband,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) DAILINK_COMP_ARRAY(COMP_CPU("wm5110-aif2")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) DAILINK_COMP_ARRAY(COMP_CODEC("wm1250-ev1.1-0027", "wm1250-ev1")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) SND_SOC_DAILINK_DEFS(wm5110_sub,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) DAILINK_COMP_ARRAY(COMP_CPU("wm5110-aif3")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) DAILINK_COMP_ARRAY(COMP_CODEC("wm9081.1-006c", "wm9081-hifi")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static struct snd_soc_dai_link bells_dai_wm5110[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .name = "CPU-DSP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .stream_name = "CPU-DSP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) | SND_SOC_DAIFMT_CBM_CFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) SND_SOC_DAILINK_REG(wm5110_cpu_dsp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .name = "DSP-CODEC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .stream_name = "DSP-CODEC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) | SND_SOC_DAIFMT_CBM_CFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .params = &sub_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) SND_SOC_DAILINK_REG(wm5110_dsp_codec),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .name = "Baseband",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .stream_name = "Baseband",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) | SND_SOC_DAIFMT_CBM_CFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .params = &baseband_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) SND_SOC_DAILINK_REG(wm5110_baseband),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .name = "Sub",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .stream_name = "Sub",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) | SND_SOC_DAIFMT_CBS_CFS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .params = &sub_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) SND_SOC_DAILINK_REG(wm5110_sub),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static struct snd_soc_codec_conf bells_codec_conf[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .dlc = COMP_CODEC_CONF("wm9081.1-006c"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .name_prefix = "Sub",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) static struct snd_soc_dapm_widget bells_widgets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) SND_SOC_DAPM_MIC("DMIC", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static struct snd_soc_dapm_route bells_routes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) { "Sub CLK_SYS", NULL, "OPCLK" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) { "CLKIN", NULL, "OPCLK" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) { "DMIC", NULL, "MICBIAS2" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) { "IN2L", NULL, "DMIC" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) { "IN2R", NULL, "DMIC" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static struct snd_soc_card bells_cards[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .name = "Bells WM2200",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .dai_link = bells_dai_wm2200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .num_links = ARRAY_SIZE(bells_dai_wm2200),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .codec_conf = bells_codec_conf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .num_configs = ARRAY_SIZE(bells_codec_conf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .late_probe = bells_late_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .dapm_widgets = bells_widgets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .num_dapm_widgets = ARRAY_SIZE(bells_widgets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .dapm_routes = bells_routes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .num_dapm_routes = ARRAY_SIZE(bells_routes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .set_bias_level = bells_set_bias_level,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .set_bias_level_post = bells_set_bias_level_post,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) .drvdata = &wm2200_drvdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .name = "Bells WM5102",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .dai_link = bells_dai_wm5102,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .num_links = ARRAY_SIZE(bells_dai_wm5102),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .codec_conf = bells_codec_conf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .num_configs = ARRAY_SIZE(bells_codec_conf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .late_probe = bells_late_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .dapm_widgets = bells_widgets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .num_dapm_widgets = ARRAY_SIZE(bells_widgets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .dapm_routes = bells_routes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .num_dapm_routes = ARRAY_SIZE(bells_routes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .set_bias_level = bells_set_bias_level,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .set_bias_level_post = bells_set_bias_level_post,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .drvdata = &wm5102_drvdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .name = "Bells WM5110",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .dai_link = bells_dai_wm5110,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .num_links = ARRAY_SIZE(bells_dai_wm5110),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .codec_conf = bells_codec_conf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .num_configs = ARRAY_SIZE(bells_codec_conf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .late_probe = bells_late_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .dapm_widgets = bells_widgets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) .num_dapm_widgets = ARRAY_SIZE(bells_widgets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .dapm_routes = bells_routes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) .num_dapm_routes = ARRAY_SIZE(bells_routes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) .set_bias_level = bells_set_bias_level,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .set_bias_level_post = bells_set_bias_level_post,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .drvdata = &wm5110_drvdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static int bells_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) bells_cards[pdev->id].dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) ret = devm_snd_soc_register_card(&pdev->dev, &bells_cards[pdev->id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) "snd_soc_register_card(%s) failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) bells_cards[pdev->id].name, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static struct platform_driver bells_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) .name = "bells",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .pm = &snd_soc_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .probe = bells_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) module_platform_driver(bells_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) MODULE_DESCRIPTION("Bells audio support");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) MODULE_ALIAS("platform:bells");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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