Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * rockchip_rt5651.c  --  RK3399 machine driver with RT5651 codecs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (c) 2016, ROCKCHIP CORPORATION.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Author: Xiaotan Luo <lxt@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * it under the terms of the GNU General Public License version 2 and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * only version 2 as published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include "rockchip_i2s.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include "../codecs/rt5651.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define DRV_NAME "rockchip-rt5651"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) static const struct snd_soc_dapm_widget rockchip_dapm_widgets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	SND_SOC_DAPM_HP("Headphones", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	SND_SOC_DAPM_SPK("Lineout", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	SND_SOC_DAPM_MIC("Headset Mic", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	SND_SOC_DAPM_MIC("Int Mic", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	SND_SOC_DAPM_MIC("HDMIIN", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) static const struct snd_soc_dapm_route rockchip_dapm_routes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	{"Headphones", NULL, "HPOL"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	{"Headphones", NULL, "HPOR"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	{"Lineout", NULL, "LOUTL"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	{"Lineout", NULL, "LOUTR"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	{"AIF2 Playback", NULL, "HDMIIN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static const struct snd_kcontrol_new rockchip_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	SOC_DAPM_PIN_SWITCH("Headphones"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	SOC_DAPM_PIN_SWITCH("Lineout"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	SOC_DAPM_PIN_SWITCH("Headset Mic"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	SOC_DAPM_PIN_SWITCH("Int Mic"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static int rockchip_rt5651_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 				     struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct snd_soc_dai *codec_dai = rtd->codec_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	int mclk, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	/* in bypass mode, the mclk has to be one of the frequencies below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	switch (params_rate(params)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	case 8000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	case 16000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	case 24000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	case 32000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	case 48000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	case 64000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	case 96000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		mclk = 12288000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	case 11025:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	case 22050:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	case 44100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	case 88200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		mclk = 11289600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	ret = snd_soc_dai_set_sysclk(cpu_dai, 0, mclk, SND_SOC_CLOCK_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		dev_err(codec_dai->dev, "Can't set cpu clock out %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	snd_soc_dai_set_pll(codec_dai, 0, RT5651_PLL1_S_MCLK, mclk, mclk * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1, mclk * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 				     SND_SOC_CLOCK_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		dev_err(codec_dai->dev, "Can't set codec clock in %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) static int rockchip_rt5651_voice_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 					   struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	struct snd_soc_dai *codec_dai = rtd->codec_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	int mclk, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	/* in bypass mode, the mclk has to be one of the frequencies below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	switch (params_rate(params)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	case 8000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	case 16000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	case 24000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	case 32000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	case 48000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	case 64000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	case 96000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		mclk = 12288000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	case 11025:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	case 22050:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	case 44100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	case 88200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		mclk = 11289600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	/*Set the system clk for codec*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	snd_soc_dai_set_pll(codec_dai, 0, RT5651_PLL1_S_MCLK, mclk, 24576000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1, 24576000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 				     SND_SOC_CLOCK_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		dev_err(codec_dai->dev, "Can't set codec clock in %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static struct snd_soc_ops rockchip_sound_rt5651_hifi_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	.hw_params = rockchip_rt5651_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static struct snd_soc_ops rockchip_sound_rt5651_voice_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	.hw_params = rockchip_rt5651_voice_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	DAILINK_RT5651_HIFI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	DAILINK_RT5651_VOICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	DAILINK_RT5651_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static struct snd_soc_dai_link rockchip_dailinks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	[DAILINK_RT5651_HIFI] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		.name = "RT5651 HIFI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		.stream_name = "RT5651 PCM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		.codec_dai_name = "rt5651-aif1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		.ops = &rockchip_sound_rt5651_hifi_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		/* set rt5651 as slave */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			SND_SOC_DAIFMT_CBS_CFS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	[DAILINK_RT5651_VOICE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		.name = "RT5651 HDMIIN",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		.stream_name = "RT5651 PCM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		.codec_dai_name = "rt5651-aif2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		.ops = &rockchip_sound_rt5651_voice_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		/* set rt5651 as slave */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 			SND_SOC_DAIFMT_CBS_CFS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static struct snd_soc_card rockchip_sound_card = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	.name = "realtekrt5651codec_hdmiin",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.dai_link = rockchip_dailinks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	.num_links =  ARRAY_SIZE(rockchip_dailinks),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.dapm_widgets = rockchip_dapm_widgets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.num_dapm_widgets = ARRAY_SIZE(rockchip_dapm_widgets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	.dapm_routes = rockchip_dapm_routes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	.num_dapm_routes = ARRAY_SIZE(rockchip_dapm_routes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	.controls = rockchip_controls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	.num_controls = ARRAY_SIZE(rockchip_controls),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static int rockchip_sound_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	struct snd_soc_card *card = &rockchip_sound_card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	struct device_node *cpu_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	dev_info(&pdev->dev, "%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	cpu_node = of_parse_phandle(pdev->dev.of_node, "rockchip,cpu", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	if (!cpu_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			"Property 'rockchip,cpu' failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	for (i = 0; i < DAILINK_RT5651_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		rockchip_dailinks[i].platform_of_node = cpu_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		rockchip_dailinks[i].cpu_of_node = cpu_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		rockchip_dailinks[i].codec_of_node =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 			of_parse_phandle(pdev->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 					 "rockchip,codec", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		if (!rockchip_dailinks[i].codec_of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 				"Property[%d] 'rockchip,codec' failed\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	card->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	platform_set_drvdata(pdev, card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	ret = devm_snd_soc_register_card(&pdev->dev, card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		dev_err(&pdev->dev, "%s register card failed %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	dev_info(&pdev->dev, "snd_soc_register_card successful\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static const struct of_device_id rockchip_sound_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	{ .compatible = "rockchip,rockchip-rt5651-sound", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static struct platform_driver rockchip_sound_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	.probe = rockchip_sound_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		.name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		.of_match_table = rockchip_sound_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		.pm = &snd_soc_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) module_platform_driver(rockchip_sound_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) MODULE_AUTHOR("Xiaotan Luo <lxt@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) MODULE_DESCRIPTION("Rockchip ASoC Machine Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MODULE_ALIAS("platform:" DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) MODULE_DEVICE_TABLE(of, rockchip_sound_of_match);