^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Rockchip DLP (Digital Loopback) driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2022 Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Sugar Zhang <sugar.zhang@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef _ROCKCHIP_DLP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define _ROCKCHIP_DLP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) struct snd_dlp_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) int (*get_fifo_count)(struct device *dev, int stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #if IS_REACHABLE(CONFIG_SND_SOC_ROCKCHIP_DLP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) int devm_snd_dmaengine_dlp_register(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) const struct snd_dlp_config *config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static inline int devm_snd_dmaengine_dlp_register(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) const struct snd_dlp_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #endif