^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Rockchip machine ASoC driver for boards using CDN DP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2016, ROCKCHIP CORPORATION. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This program is free software; you can redistribute it and/or modify it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * under the terms and conditions of the GNU General Public License,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * version 2, as published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This program is distributed in the hope it will be useful, but WITHOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * along with this program. If not, see <http://www.gnu.org/licenses/>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <sound/jack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <sound/hdmi-codec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DRV_NAME "rockchip-cdndp-sound"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static int rockchip_sound_cdndp_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct snd_soc_pcm_runtime *rtd = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int mclk, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* in bypass mode, the mclk has to be one of the frequencies below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) switch (params_rate(params)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) case 8000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) case 16000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) case 24000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) case 32000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) case 48000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) case 64000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) case 96000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) mclk = 12288000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) case 11025:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) case 22050:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) case 44100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) case 88200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) mclk = 11289600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) case 176400:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) mclk = 11289600 * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) case 192000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) mclk = 12288000 * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ret = snd_soc_dai_set_sysclk(cpu_dai, 0, mclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) SND_SOC_CLOCK_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (ret && ret != -ENOTSUPP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) dev_err(cpu_dai->dev, "Can't set cpu clock %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static struct snd_soc_jack cdn_dp_card_jack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static int rockchip_sound_cdndp_init(struct snd_soc_pcm_runtime *runtime)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct snd_soc_card *card = runtime->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct snd_soc_codec *codec = runtime->codec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* enable jack detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ret = snd_soc_card_jack_new(card, "DP Jack", SND_JACK_LINEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) &cdn_dp_card_jack, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) dev_err(card->dev, "Can't create DP Jack %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return hdmi_codec_set_jack_detect(codec, &cdn_dp_card_jack);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static struct snd_soc_ops rockchip_sound_cdndp_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .hw_params = rockchip_sound_cdndp_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static struct snd_soc_dai_link cdndp_dailink = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .name = "DP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .stream_name = "DP PCM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .codec_dai_name = "spdif-hifi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .init = rockchip_sound_cdndp_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .ops = &rockchip_sound_cdndp_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) SND_SOC_DAIFMT_CBS_CFS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static struct snd_soc_card rockchip_sound_card = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .name = "rockchip-cdndp-sound",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .dai_link = &cdndp_dailink,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .num_links = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static int rockchip_sound_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct snd_soc_card *card = &rockchip_sound_card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct device_node *cpu_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) cpu_node = of_parse_phandle(pdev->dev.of_node, "rockchip,cpu", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (!cpu_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) dev_err(&pdev->dev, "Property 'rockchip,cpu' missing or invalid\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) cdndp_dailink.platform_of_node = cpu_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) cdndp_dailink.cpu_of_node = cpu_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) cdndp_dailink.codec_of_node = of_parse_phandle(pdev->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) "rockchip,codec", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (!cdndp_dailink.codec_of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) dev_err(&pdev->dev, "Property 'rockchip,codec' invalid\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) card->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) platform_set_drvdata(pdev, card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ret = devm_snd_soc_register_card(&pdev->dev, card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) dev_err(&pdev->dev, "%s snd_soc_register_card fail %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static const struct of_device_id rockchip_sound_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) { .compatible = "rockchip,cdndp-sound", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static struct platform_driver rockchip_sound_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .probe = rockchip_sound_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .of_match_table = rockchip_sound_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .pm = &snd_soc_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) module_platform_driver(rockchip_sound_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) MODULE_DESCRIPTION("Rockchip CDN DP Machine Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) MODULE_ALIAS("platform:" DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) MODULE_DEVICE_TABLE(of, rockchip_sound_of_match);