Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2018, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <sound/jack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/soundwire/sdw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <uapi/linux/input-event-codes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include "qdsp6/q6afe.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include "../codecs/rt5663.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define DRIVER_NAME	"sdm845"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define DEFAULT_SAMPLE_RATE_48K		48000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define DEFAULT_MCLK_RATE		24576000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define TDM_BCLK_RATE		6144000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define MI2S_BCLK_RATE		1536000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define LEFT_SPK_TDM_TX_MASK    0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define RIGHT_SPK_TDM_TX_MASK   0xC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define SPK_TDM_RX_MASK         0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define NUM_TDM_SLOTS           8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define SLIM_MAX_TX_PORTS 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define SLIM_MAX_RX_PORTS 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define WCD934X_DEFAULT_MCLK_RATE	9600000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) struct sdm845_snd_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct snd_soc_jack jack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	bool jack_setup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	bool stream_prepared[AFE_PORT_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	struct snd_soc_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	uint32_t pri_mi2s_clk_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	uint32_t sec_mi2s_clk_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	uint32_t quat_tdm_clk_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct sdw_stream_runtime *sruntime[AFE_PORT_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) static unsigned int tdm_slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static int sdm845_slim_snd_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 				     struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct snd_soc_dai *codec_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct sdm845_snd_data *pdata = snd_soc_card_get_drvdata(rtd->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct sdw_stream_runtime *sruntime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	int ret = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	for_each_rtd_codec_dais(rtd, i, codec_dai) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		sruntime = snd_soc_dai_get_sdw_stream(codec_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 						      substream->stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		if (sruntime != ERR_PTR(-ENOTSUPP))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 			pdata->sruntime[cpu_dai->id] = sruntime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		ret = snd_soc_dai_get_channel_map(codec_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 				&tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		if (ret != 0 && ret != -ENOTSUPP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 			pr_err("failed to get codec chan map, err:%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		} else if (ret == -ENOTSUPP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 			/* Ignore unsupported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 			ret = snd_soc_dai_set_channel_map(cpu_dai, 0, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 							  rx_ch_cnt, rx_ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			ret = snd_soc_dai_set_channel_map(cpu_dai, tx_ch_cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 							  tx_ch, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static int sdm845_tdm_snd_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 					struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct snd_soc_dai *codec_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	int ret = 0, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	int channels, slot_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	switch (params_format(params)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	case SNDRV_PCM_FORMAT_S16_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		slot_width = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		dev_err(rtd->dev, "%s: invalid param format 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				__func__, params_format(params));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	channels = params_channels(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, 0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 				8, slot_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			dev_err(rtd->dev, "%s: failed to set tdm slot, err:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 					__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		ret = snd_soc_dai_set_channel_map(cpu_dai, 0, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 				channels, tdm_slot_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			dev_err(rtd->dev, "%s: failed to set channel map, err:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 					__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 			goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0xf, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 				8, slot_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			dev_err(rtd->dev, "%s: failed to set tdm slot, err:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 					__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		ret = snd_soc_dai_set_channel_map(cpu_dai, channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 				tdm_slot_offset, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			dev_err(rtd->dev, "%s: failed to set channel map, err:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 					__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	for_each_rtd_codec_dais(rtd, j, codec_dai) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		if (!strcmp(codec_dai->component->name_prefix, "Left")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			ret = snd_soc_dai_set_tdm_slot(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 					codec_dai, LEFT_SPK_TDM_TX_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 					SPK_TDM_RX_MASK, NUM_TDM_SLOTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 					slot_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 			if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 				dev_err(rtd->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 					"DEV0 TDM slot err:%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		if (!strcmp(codec_dai->component->name_prefix, "Right")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 			ret = snd_soc_dai_set_tdm_slot(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 					codec_dai, RIGHT_SPK_TDM_TX_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 					SPK_TDM_RX_MASK, NUM_TDM_SLOTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 					slot_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 				dev_err(rtd->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 					"DEV1 TDM slot err:%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static int sdm845_snd_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 					struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	switch (cpu_dai->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	case PRIMARY_MI2S_RX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	case PRIMARY_MI2S_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		 * Use ASRC for internal clocks, as PLL rate isn't multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		 * of BCLK.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		rt5663_sel_asrc_clk_src(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			codec_dai->component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 			RT5663_DA_STEREO_FILTER | RT5663_AD_STEREO_FILTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 			RT5663_CLK_SEL_I2S1_ASRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		ret = snd_soc_dai_set_sysclk(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			codec_dai, RT5663_SCLK_S_MCLK, DEFAULT_MCLK_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 			SND_SOC_CLOCK_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			dev_err(rtd->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 				"snd_soc_dai_set_sysclk err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	case QUATERNARY_TDM_RX_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	case QUATERNARY_TDM_TX_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		ret = sdm845_tdm_snd_hw_params(substream, params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	case SLIMBUS_0_RX...SLIMBUS_6_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		ret = sdm845_slim_snd_hw_params(substream, params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	case QUATERNARY_MI2S_RX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		pr_err("%s: invalid dai id 0x%x\n", __func__, cpu_dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static void sdm845_jack_free(struct snd_jack *jack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	struct snd_soc_component *component = jack->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	snd_soc_component_set_jack(component, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static int sdm845_dai_init(struct snd_soc_pcm_runtime *rtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	struct snd_soc_component *component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	struct snd_soc_card *card = rtd->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	struct sdm845_snd_data *pdata = snd_soc_card_get_drvdata(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	struct snd_jack *jack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	 * Codec SLIMBUS configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8, RX9, RX10, RX11, RX12, RX13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	 * TX14, TX15, TX16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	unsigned int rx_ch[SLIM_MAX_RX_PORTS] = {144, 145, 146, 147, 148, 149,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 					150, 151, 152, 153, 154, 155, 156};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	unsigned int tx_ch[SLIM_MAX_TX_PORTS] = {128, 129, 130, 131, 132, 133,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 					    134, 135, 136, 137, 138, 139,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 					    140, 141, 142, 143};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	int rval, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	if (!pdata->jack_setup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		rval = snd_soc_card_jack_new(card, "Headset Jack",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 				SND_JACK_HEADSET |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 				SND_JACK_HEADPHONE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 				SND_JACK_BTN_0 | SND_JACK_BTN_1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 				SND_JACK_BTN_2 | SND_JACK_BTN_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 				&pdata->jack, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		if (rval < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 			dev_err(card->dev, "Unable to add Headphone Jack\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 			return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		jack = pdata->jack.jack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		snd_jack_set_key(jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		snd_jack_set_key(jack, SND_JACK_BTN_1, KEY_VOICECOMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		snd_jack_set_key(jack, SND_JACK_BTN_2, KEY_VOLUMEUP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		snd_jack_set_key(jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		pdata->jack_setup = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	switch (cpu_dai->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	case PRIMARY_MI2S_RX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		jack  = pdata->jack.jack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		component = codec_dai->component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		jack->private_data = component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		jack->private_free = sdm845_jack_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		rval = snd_soc_component_set_jack(component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 						  &pdata->jack, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		if (rval != 0 && rval != -ENOTSUPP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 			dev_warn(card->dev, "Failed to set jack: %d\n", rval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 			return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	case SLIMBUS_0_RX...SLIMBUS_6_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		for_each_rtd_codec_dais(rtd, i, codec_dai) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 			rval = snd_soc_dai_set_channel_map(codec_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 							  ARRAY_SIZE(tx_ch),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 							  tx_ch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 							  ARRAY_SIZE(rx_ch),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 							  rx_ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 			if (rval != 0 && rval != -ENOTSUPP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 				return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 			snd_soc_dai_set_sysclk(codec_dai, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 					       WCD934X_DEFAULT_MCLK_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 					       SNDRV_PCM_STREAM_PLAYBACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static int sdm845_snd_startup(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	unsigned int codec_dai_fmt = SND_SOC_DAIFMT_CBS_CFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	struct snd_soc_card *card = rtd->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	struct sdm845_snd_data *data = snd_soc_card_get_drvdata(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	switch (cpu_dai->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	case PRIMARY_MI2S_RX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	case PRIMARY_MI2S_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		codec_dai_fmt |= SND_SOC_DAIFMT_NB_NF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		if (++(data->pri_mi2s_clk_count) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 			snd_soc_dai_set_sysclk(cpu_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 				Q6AFE_LPASS_CLK_ID_MCLK_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 				DEFAULT_MCLK_RATE, SNDRV_PCM_STREAM_PLAYBACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 			snd_soc_dai_set_sysclk(cpu_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 				Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 				MI2S_BCLK_RATE, SNDRV_PCM_STREAM_PLAYBACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		snd_soc_dai_set_fmt(cpu_dai, fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	case SECONDARY_MI2S_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		codec_dai_fmt |= SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		if (++(data->sec_mi2s_clk_count) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 			snd_soc_dai_set_sysclk(cpu_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 				Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 				MI2S_BCLK_RATE,	SNDRV_PCM_STREAM_CAPTURE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		snd_soc_dai_set_fmt(cpu_dai, fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 		snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	case QUATERNARY_MI2S_RX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		snd_soc_dai_set_sysclk(cpu_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 			Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 			MI2S_BCLK_RATE, SNDRV_PCM_STREAM_PLAYBACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	case QUATERNARY_TDM_RX_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	case QUATERNARY_TDM_TX_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		if (++(data->quat_tdm_clk_count) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 			snd_soc_dai_set_sysclk(cpu_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 				Q6AFE_LPASS_CLK_ID_QUAD_TDM_IBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 				TDM_BCLK_RATE, SNDRV_PCM_STREAM_PLAYBACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 		codec_dai_fmt |= SND_SOC_DAIFMT_IB_NF | SND_SOC_DAIFMT_DSP_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		for_each_rtd_codec_dais(rtd, j, codec_dai) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 			if (!strcmp(codec_dai->component->name_prefix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 				    "Left")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 				ret = snd_soc_dai_set_fmt(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 						codec_dai, codec_dai_fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 				if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 					dev_err(rtd->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 						"Left TDM fmt err:%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 					return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 				}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 			if (!strcmp(codec_dai->component->name_prefix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 				    "Right")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 				ret = snd_soc_dai_set_fmt(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 						codec_dai, codec_dai_fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 				if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 					dev_err(rtd->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 						"Right TDM slot err:%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 					return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 				}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	case SLIMBUS_0_RX...SLIMBUS_6_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 		pr_err("%s: invalid dai id 0x%x\n", __func__, cpu_dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static void  sdm845_snd_shutdown(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	struct snd_soc_card *card = rtd->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	struct sdm845_snd_data *data = snd_soc_card_get_drvdata(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	switch (cpu_dai->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	case PRIMARY_MI2S_RX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	case PRIMARY_MI2S_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 		if (--(data->pri_mi2s_clk_count) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 			snd_soc_dai_set_sysclk(cpu_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 				Q6AFE_LPASS_CLK_ID_MCLK_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 				0, SNDRV_PCM_STREAM_PLAYBACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 			snd_soc_dai_set_sysclk(cpu_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 				Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 				0, SNDRV_PCM_STREAM_PLAYBACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	case SECONDARY_MI2S_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 		if (--(data->sec_mi2s_clk_count) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 			snd_soc_dai_set_sysclk(cpu_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 				Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 				0, SNDRV_PCM_STREAM_CAPTURE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	case QUATERNARY_TDM_RX_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	case QUATERNARY_TDM_TX_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 		if (--(data->quat_tdm_clk_count) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 			snd_soc_dai_set_sysclk(cpu_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 				Q6AFE_LPASS_CLK_ID_QUAD_TDM_IBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 				0, SNDRV_PCM_STREAM_PLAYBACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	case SLIMBUS_0_RX...SLIMBUS_6_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	case QUATERNARY_MI2S_RX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 		pr_err("%s: invalid dai id 0x%x\n", __func__, cpu_dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static int sdm845_snd_prepare(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	struct sdm845_snd_data *data = snd_soc_card_get_drvdata(rtd->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	struct sdw_stream_runtime *sruntime = data->sruntime[cpu_dai->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	if (!sruntime)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	if (data->stream_prepared[cpu_dai->id]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 		sdw_disable_stream(sruntime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 		sdw_deprepare_stream(sruntime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 		data->stream_prepared[cpu_dai->id] = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	ret = sdw_prepare_stream(sruntime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	/**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	 * NOTE: there is a strict hw requirement about the ordering of port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	 * enables and actual WSA881x PA enable. PA enable should only happen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	 * after soundwire ports are enabled if not DC on the line is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	 * accumulated resulting in Click/Pop Noise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	 * PA enable/mute are handled as part of codec DAPM and digital mute.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	ret = sdw_enable_stream(sruntime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 		sdw_deprepare_stream(sruntime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	data->stream_prepared[cpu_dai->id] = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static int sdm845_snd_hw_free(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	struct sdm845_snd_data *data = snd_soc_card_get_drvdata(rtd->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	struct sdw_stream_runtime *sruntime = data->sruntime[cpu_dai->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	if (sruntime && data->stream_prepared[cpu_dai->id]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 		sdw_disable_stream(sruntime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 		sdw_deprepare_stream(sruntime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 		data->stream_prepared[cpu_dai->id] = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static const struct snd_soc_ops sdm845_be_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	.hw_params = sdm845_snd_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	.hw_free = sdm845_snd_hw_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	.prepare = sdm845_snd_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	.startup = sdm845_snd_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	.shutdown = sdm845_snd_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static int sdm845_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 				struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	struct snd_interval *rate = hw_param_interval(params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 					SNDRV_PCM_HW_PARAM_RATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	struct snd_interval *channels = hw_param_interval(params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 					SNDRV_PCM_HW_PARAM_CHANNELS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 	struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	rate->min = rate->max = DEFAULT_SAMPLE_RATE_48K;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	channels->min = channels->max = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 	snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S16_LE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) static const struct snd_soc_dapm_widget sdm845_snd_widgets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	SND_SOC_DAPM_HP("Headphone Jack", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 	SND_SOC_DAPM_MIC("Headset Mic", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	SND_SOC_DAPM_SPK("Left Spk", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	SND_SOC_DAPM_SPK("Right Spk", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	SND_SOC_DAPM_MIC("Int Mic", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) static void sdm845_add_ops(struct snd_soc_card *card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	struct snd_soc_dai_link *link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 	for_each_card_prelinks(card, i, link) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 		if (link->no_pcm == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 			link->ops = &sdm845_be_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 			link->be_hw_params_fixup = sdm845_be_hw_params_fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 		link->init = sdm845_dai_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) static int sdm845_snd_platform_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 	struct snd_soc_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	struct sdm845_snd_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 	card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 	if (!card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 	/* Allocate the private data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	card->driver_name = DRIVER_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	card->dapm_widgets = sdm845_snd_widgets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	card->num_dapm_widgets = ARRAY_SIZE(sdm845_snd_widgets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	card->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 	card->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 	dev_set_drvdata(dev, card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	ret = qcom_snd_parse_of(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 	data->card = card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 	snd_soc_card_set_drvdata(card, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 	sdm845_add_ops(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 	return devm_snd_soc_register_card(dev, card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) static const struct of_device_id sdm845_snd_device_id[]  = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 	{ .compatible = "qcom,sdm845-sndcard" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 	{ .compatible = "qcom,db845c-sndcard" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 	{ .compatible = "lenovo,yoga-c630-sndcard" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) MODULE_DEVICE_TABLE(of, sdm845_snd_device_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static struct platform_driver sdm845_snd_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 	.probe = sdm845_snd_platform_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 		.name = "msm-snd-sdm845",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 		.of_match_table = sdm845_snd_device_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) module_platform_driver(sdm845_snd_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) MODULE_DESCRIPTION("sdm845 ASoC Machine Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) MODULE_LICENSE("GPL v2");