^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright (c) 2018, Linaro Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "q6afe.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define Q6AFE_TDM_PB_DAI(pre, num, did) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .playback = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .stream_name = pre" TDM"#num" Playback", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) SNDRV_PCM_RATE_176400, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .formats = SNDRV_PCM_FMTBIT_S16_LE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) SNDRV_PCM_FMTBIT_S24_LE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) SNDRV_PCM_FMTBIT_S32_LE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .channels_min = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .channels_max = 8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .rate_min = 8000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .rate_max = 176400, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .name = #did, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .ops = &q6tdm_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .id = did, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .probe = msm_dai_q6_dai_probe, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .remove = msm_dai_q6_dai_remove, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define Q6AFE_TDM_CAP_DAI(pre, num, did) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .capture = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .stream_name = pre" TDM"#num" Capture", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) SNDRV_PCM_RATE_176400, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .formats = SNDRV_PCM_FMTBIT_S16_LE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) SNDRV_PCM_FMTBIT_S24_LE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) SNDRV_PCM_FMTBIT_S32_LE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .channels_min = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .channels_max = 8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .rate_min = 8000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .rate_max = 176400, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .name = #did, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .ops = &q6tdm_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .id = did, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .probe = msm_dai_q6_dai_probe, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .remove = msm_dai_q6_dai_remove, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define Q6AFE_CDC_DMA_RX_DAI(did) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .playback = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .stream_name = #did" Playback", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) SNDRV_PCM_RATE_176400, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .formats = SNDRV_PCM_FMTBIT_S16_LE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) SNDRV_PCM_FMTBIT_S24_LE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) SNDRV_PCM_FMTBIT_S32_LE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .channels_min = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .channels_max = 8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .rate_min = 8000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .rate_max = 176400, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .name = #did, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .ops = &q6dma_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .id = did, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .probe = msm_dai_q6_dai_probe, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .remove = msm_dai_q6_dai_remove, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define Q6AFE_CDC_DMA_TX_DAI(did) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .capture = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .stream_name = #did" Capture", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) SNDRV_PCM_RATE_176400, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .formats = SNDRV_PCM_FMTBIT_S16_LE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) SNDRV_PCM_FMTBIT_S24_LE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) SNDRV_PCM_FMTBIT_S32_LE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .channels_min = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .channels_max = 8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .rate_min = 8000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .rate_max = 176400, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .name = #did, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .ops = &q6dma_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .id = did, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .probe = msm_dai_q6_dai_probe, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .remove = msm_dai_q6_dai_remove, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct q6afe_dai_priv_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) uint32_t sd_line_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) uint32_t sync_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) uint32_t sync_src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) uint32_t data_out_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) uint32_t invert_sync;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) uint32_t data_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) uint32_t data_align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct q6afe_dai_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct q6afe_port *port[AFE_PORT_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct q6afe_port_config port_config[AFE_PORT_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) bool is_port_started[AFE_PORT_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct q6afe_dai_priv_data priv[AFE_PORT_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int q6slim_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct q6afe_slim_cfg *slim = &dai_data->port_config[dai->id].slim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) slim->sample_rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) switch (params_format(params)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) case SNDRV_PCM_FORMAT_S16_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) case SNDRV_PCM_FORMAT_SPECIAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) slim->bit_width = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) case SNDRV_PCM_FORMAT_S24_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) slim->bit_width = 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) case SNDRV_PCM_FORMAT_S32_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) slim->bit_width = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) pr_err("%s: format %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) __func__, params_format(params));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static int q6hdmi_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int channels = params_channels(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct q6afe_hdmi_cfg *hdmi = &dai_data->port_config[dai->id].hdmi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) hdmi->sample_rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) switch (params_format(params)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) case SNDRV_PCM_FORMAT_S16_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) hdmi->bit_width = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) case SNDRV_PCM_FORMAT_S24_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) hdmi->bit_width = 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* HDMI spec CEA-861-E: Table 28 Audio InfoFrame Data Byte 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) switch (channels) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) hdmi->channel_allocation = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) hdmi->channel_allocation = 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) hdmi->channel_allocation = 0x06;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) case 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) hdmi->channel_allocation = 0x0A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) hdmi->channel_allocation = 0x0B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) case 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) hdmi->channel_allocation = 0x12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) hdmi->channel_allocation = 0x13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) dev_err(dai->dev, "invalid Channels = %u\n", channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static int q6i2s_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) i2s->sample_rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) i2s->bit_width = params_width(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) i2s->num_channels = params_channels(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) i2s->sd_line_mask = dai_data->priv[dai->id].sd_line_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static int q6i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) i2s->fmt = fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static int q6tdm_set_tdm_slot(struct snd_soc_dai *dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) unsigned int tx_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) unsigned int rx_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) int slots, int slot_width)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) unsigned int cap_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* HW only supports 16 and 32 bit slot width configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if ((slot_width != 16) && (slot_width != 32)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) dev_err(dai->dev, "%s: invalid slot_width %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) __func__, slot_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* HW supports 1-32 slots configuration. Typical: 1, 2, 4, 8, 16, 32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) switch (slots) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) cap_mask = 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) cap_mask = 0x0F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) cap_mask = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) case 16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) cap_mask = 0xFFFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) dev_err(dai->dev, "%s: invalid slots %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) __func__, slots);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) switch (dai->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) tdm->nslots_per_frame = slots;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) tdm->slot_width = slot_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) /* TDM RX dais ids are even and tx are odd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) tdm->slot_mask = (dai->id & 0x1 ? tx_mask : rx_mask) & cap_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) __func__, dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static int q6tdm_set_channel_map(struct snd_soc_dai *dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) unsigned int tx_num, unsigned int *tx_slot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) unsigned int rx_num, unsigned int *rx_slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) switch (dai->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (dai->id & 0x1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (!tx_slot) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) dev_err(dai->dev, "tx slot not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (tx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) dev_err(dai->dev, "invalid tx num %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) tx_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) for (i = 0; i < tx_num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) tdm->ch_mapping[i] = tx_slot[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) for (i = tx_num; i < AFE_PORT_MAX_AUDIO_CHAN_CNT; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) tdm->num_channels = tx_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /* rx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (!rx_slot) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) dev_err(dai->dev, "rx slot not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) if (rx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) dev_err(dai->dev, "invalid rx num %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) rx_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) for (i = 0; i < rx_num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) tdm->ch_mapping[i] = rx_slot[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) for (i = rx_num; i < AFE_PORT_MAX_AUDIO_CHAN_CNT; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) tdm->num_channels = rx_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) __func__, dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static int q6tdm_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) tdm->bit_width = params_width(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) tdm->sample_rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) tdm->num_channels = params_channels(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) tdm->data_align_type = dai_data->priv[dai->id].data_align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) tdm->sync_src = dai_data->priv[dai->id].sync_src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) tdm->sync_mode = dai_data->priv[dai->id].sync_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static int q6dma_set_channel_map(struct snd_soc_dai *dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) unsigned int tx_num, unsigned int *tx_ch_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) unsigned int rx_num, unsigned int *rx_ch_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) int ch_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) switch (dai->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) case WSA_CODEC_DMA_TX_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) case WSA_CODEC_DMA_TX_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) case WSA_CODEC_DMA_TX_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) case VA_CODEC_DMA_TX_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) case VA_CODEC_DMA_TX_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) case VA_CODEC_DMA_TX_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) case TX_CODEC_DMA_TX_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) case TX_CODEC_DMA_TX_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) case TX_CODEC_DMA_TX_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) case TX_CODEC_DMA_TX_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) case TX_CODEC_DMA_TX_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) case TX_CODEC_DMA_TX_5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (!tx_ch_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) dev_err(dai->dev, "tx slot not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (tx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) dev_err(dai->dev, "invalid tx num %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) tx_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ch_mask = *tx_ch_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) case WSA_CODEC_DMA_RX_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) case WSA_CODEC_DMA_RX_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) case RX_CODEC_DMA_RX_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) case RX_CODEC_DMA_RX_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) case RX_CODEC_DMA_RX_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) case RX_CODEC_DMA_RX_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) case RX_CODEC_DMA_RX_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) case RX_CODEC_DMA_RX_5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) case RX_CODEC_DMA_RX_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) case RX_CODEC_DMA_RX_7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) /* rx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (!rx_ch_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) dev_err(dai->dev, "rx slot not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) if (rx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) dev_err(dai->dev, "invalid rx num %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) rx_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) ch_mask = *rx_ch_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) __func__, dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) cfg->active_channels_mask = ch_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static int q6dma_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) cfg->bit_width = params_width(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) cfg->sample_rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) cfg->num_channels = params_channels(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static void q6afe_dai_shutdown(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (!dai_data->is_port_started[dai->id])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) rc = q6afe_port_stop(dai_data->port[dai->id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) dev_err(dai->dev, "fail to close AFE port (%d)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) dai_data->is_port_started[dai->id] = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) static int q6afe_dai_prepare(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (dai_data->is_port_started[dai->id]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /* stop the port and restart with new port config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) rc = q6afe_port_stop(dai_data->port[dai->id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) dev_err(dai->dev, "fail to close AFE port (%d)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) switch (dai->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) case HDMI_RX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) case DISPLAY_PORT_RX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) q6afe_hdmi_port_prepare(dai_data->port[dai->id],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) &dai_data->port_config[dai->id].hdmi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) case SLIMBUS_0_RX ... SLIMBUS_6_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) q6afe_slim_port_prepare(dai_data->port[dai->id],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) &dai_data->port_config[dai->id].slim);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) rc = q6afe_i2s_port_prepare(dai_data->port[dai->id],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) &dai_data->port_config[dai->id].i2s_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) dev_err(dai->dev, "fail to prepare AFE port %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) q6afe_tdm_port_prepare(dai_data->port[dai->id],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) &dai_data->port_config[dai->id].tdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) case WSA_CODEC_DMA_RX_0 ... RX_CODEC_DMA_RX_7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) q6afe_cdc_dma_port_prepare(dai_data->port[dai->id],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) &dai_data->port_config[dai->id].dma_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) rc = q6afe_port_start(dai_data->port[dai->id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) dev_err(dai->dev, "fail to start AFE port %x\n", dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) dai_data->is_port_started[dai->id] = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static int q6slim_set_channel_map(struct snd_soc_dai *dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) unsigned int tx_num, unsigned int *tx_slot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) unsigned int rx_num, unsigned int *rx_slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) struct q6afe_port_config *pcfg = &dai_data->port_config[dai->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) if (dai->id & 0x1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (!tx_slot) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) pr_err("%s: tx slot not found\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) for (i = 0; i < tx_num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) pcfg->slim.ch_mapping[i] = tx_slot[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) pcfg->slim.num_channels = tx_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) if (!rx_slot) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) pr_err("%s: rx slot not found\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) for (i = 0; i < rx_num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) pcfg->slim.ch_mapping[i] = rx_slot[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) pcfg->slim.num_channels = rx_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) static int q6afe_mi2s_set_sysclk(struct snd_soc_dai *dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) int clk_id, unsigned int freq, int dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) struct q6afe_port *port = dai_data->port[dai->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) switch (clk_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) case LPAIF_DIG_CLK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) return q6afe_port_set_sysclk(port, clk_id, 0, 5, freq, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) case LPAIF_BIT_CLK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) case LPAIF_OSR_CLK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) return q6afe_port_set_sysclk(port, clk_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) Q6AFE_LPASS_CLK_SRC_INTERNAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) Q6AFE_LPASS_CLK_ROOT_DEFAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) freq, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) case Q6AFE_LPASS_CLK_ID_WSA_CORE_MCLK ... Q6AFE_LPASS_CLK_ID_VA_CORE_2X_MCLK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return q6afe_port_set_sysclk(port, clk_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) Q6AFE_LPASS_CLK_ROOT_DEFAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) freq, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) case Q6AFE_LPASS_CLK_ID_PRI_TDM_IBIT ... Q6AFE_LPASS_CLK_ID_QUIN_TDM_EBIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) return q6afe_port_set_sysclk(port, clk_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) Q6AFE_LPASS_CLK_ATTRIBUTE_INVERT_COUPLE_NO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) Q6AFE_LPASS_CLK_ROOT_DEFAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) freq, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) {"HDMI Playback", NULL, "HDMI_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {"Display Port Playback", NULL, "DISPLAY_PORT_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) {"Slimbus Playback", NULL, "SLIMBUS_0_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {"Slimbus1 Playback", NULL, "SLIMBUS_1_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) {"Slimbus2 Playback", NULL, "SLIMBUS_2_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) {"Slimbus3 Playback", NULL, "SLIMBUS_3_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) {"Slimbus4 Playback", NULL, "SLIMBUS_4_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) {"Slimbus5 Playback", NULL, "SLIMBUS_5_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) {"Slimbus6 Playback", NULL, "SLIMBUS_6_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) {"SLIMBUS_0_TX", NULL, "Slimbus Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) {"SLIMBUS_1_TX", NULL, "Slimbus1 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) {"SLIMBUS_2_TX", NULL, "Slimbus2 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {"SLIMBUS_3_TX", NULL, "Slimbus3 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) {"SLIMBUS_4_TX", NULL, "Slimbus4 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {"SLIMBUS_5_TX", NULL, "Slimbus5 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) {"SLIMBUS_6_TX", NULL, "Slimbus6 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) {"Primary MI2S Playback", NULL, "PRI_MI2S_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) {"Secondary MI2S Playback", NULL, "SEC_MI2S_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {"Tertiary MI2S Playback", NULL, "TERT_MI2S_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) {"Quaternary MI2S Playback", NULL, "QUAT_MI2S_RX"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) {"Primary TDM0 Playback", NULL, "PRIMARY_TDM_RX_0"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) {"Primary TDM1 Playback", NULL, "PRIMARY_TDM_RX_1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) {"Primary TDM2 Playback", NULL, "PRIMARY_TDM_RX_2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) {"Primary TDM3 Playback", NULL, "PRIMARY_TDM_RX_3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) {"Primary TDM4 Playback", NULL, "PRIMARY_TDM_RX_4"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {"Primary TDM5 Playback", NULL, "PRIMARY_TDM_RX_5"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) {"Primary TDM6 Playback", NULL, "PRIMARY_TDM_RX_6"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) {"Primary TDM7 Playback", NULL, "PRIMARY_TDM_RX_7"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) {"Secondary TDM0 Playback", NULL, "SEC_TDM_RX_0"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) {"Secondary TDM1 Playback", NULL, "SEC_TDM_RX_1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) {"Secondary TDM2 Playback", NULL, "SEC_TDM_RX_2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) {"Secondary TDM3 Playback", NULL, "SEC_TDM_RX_3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) {"Secondary TDM4 Playback", NULL, "SEC_TDM_RX_4"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) {"Secondary TDM5 Playback", NULL, "SEC_TDM_RX_5"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) {"Secondary TDM6 Playback", NULL, "SEC_TDM_RX_6"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) {"Secondary TDM7 Playback", NULL, "SEC_TDM_RX_7"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {"Tertiary TDM0 Playback", NULL, "TERT_TDM_RX_0"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) {"Tertiary TDM1 Playback", NULL, "TERT_TDM_RX_1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) {"Tertiary TDM2 Playback", NULL, "TERT_TDM_RX_2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) {"Tertiary TDM3 Playback", NULL, "TERT_TDM_RX_3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) {"Tertiary TDM4 Playback", NULL, "TERT_TDM_RX_4"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) {"Tertiary TDM5 Playback", NULL, "TERT_TDM_RX_5"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) {"Tertiary TDM6 Playback", NULL, "TERT_TDM_RX_6"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) {"Tertiary TDM7 Playback", NULL, "TERT_TDM_RX_7"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) {"Quaternary TDM0 Playback", NULL, "QUAT_TDM_RX_0"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) {"Quaternary TDM1 Playback", NULL, "QUAT_TDM_RX_1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) {"Quaternary TDM2 Playback", NULL, "QUAT_TDM_RX_2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) {"Quaternary TDM3 Playback", NULL, "QUAT_TDM_RX_3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) {"Quaternary TDM4 Playback", NULL, "QUAT_TDM_RX_4"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) {"Quaternary TDM5 Playback", NULL, "QUAT_TDM_RX_5"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) {"Quaternary TDM6 Playback", NULL, "QUAT_TDM_RX_6"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) {"Quaternary TDM7 Playback", NULL, "QUAT_TDM_RX_7"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {"Quinary TDM0 Playback", NULL, "QUIN_TDM_RX_0"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) {"Quinary TDM1 Playback", NULL, "QUIN_TDM_RX_1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) {"Quinary TDM2 Playback", NULL, "QUIN_TDM_RX_2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {"Quinary TDM3 Playback", NULL, "QUIN_TDM_RX_3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) {"Quinary TDM4 Playback", NULL, "QUIN_TDM_RX_4"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {"Quinary TDM5 Playback", NULL, "QUIN_TDM_RX_5"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) {"Quinary TDM6 Playback", NULL, "QUIN_TDM_RX_6"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) {"Quinary TDM7 Playback", NULL, "QUIN_TDM_RX_7"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) {"PRIMARY_TDM_TX_0", NULL, "Primary TDM0 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) {"PRIMARY_TDM_TX_1", NULL, "Primary TDM1 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) {"PRIMARY_TDM_TX_2", NULL, "Primary TDM2 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) {"PRIMARY_TDM_TX_3", NULL, "Primary TDM3 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) {"PRIMARY_TDM_TX_4", NULL, "Primary TDM4 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) {"PRIMARY_TDM_TX_5", NULL, "Primary TDM5 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) {"PRIMARY_TDM_TX_6", NULL, "Primary TDM6 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) {"PRIMARY_TDM_TX_7", NULL, "Primary TDM7 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) {"SEC_TDM_TX_0", NULL, "Secondary TDM0 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) {"SEC_TDM_TX_1", NULL, "Secondary TDM1 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) {"SEC_TDM_TX_2", NULL, "Secondary TDM2 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) {"SEC_TDM_TX_3", NULL, "Secondary TDM3 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) {"SEC_TDM_TX_4", NULL, "Secondary TDM4 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) {"SEC_TDM_TX_5", NULL, "Secondary TDM5 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) {"SEC_TDM_TX_6", NULL, "Secondary TDM6 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) {"SEC_TDM_TX_7", NULL, "Secondary TDM7 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) {"TERT_TDM_TX_0", NULL, "Tertiary TDM0 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {"TERT_TDM_TX_1", NULL, "Tertiary TDM1 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) {"TERT_TDM_TX_2", NULL, "Tertiary TDM2 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) {"TERT_TDM_TX_3", NULL, "Tertiary TDM3 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) {"TERT_TDM_TX_4", NULL, "Tertiary TDM4 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) {"TERT_TDM_TX_5", NULL, "Tertiary TDM5 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) {"TERT_TDM_TX_6", NULL, "Tertiary TDM6 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) {"TERT_TDM_TX_7", NULL, "Tertiary TDM7 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) {"QUAT_TDM_TX_0", NULL, "Quaternary TDM0 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {"QUAT_TDM_TX_1", NULL, "Quaternary TDM1 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) {"QUAT_TDM_TX_2", NULL, "Quaternary TDM2 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) {"QUAT_TDM_TX_3", NULL, "Quaternary TDM3 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) {"QUAT_TDM_TX_4", NULL, "Quaternary TDM4 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) {"QUAT_TDM_TX_5", NULL, "Quaternary TDM5 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) {"QUAT_TDM_TX_6", NULL, "Quaternary TDM6 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) {"QUAT_TDM_TX_7", NULL, "Quaternary TDM7 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) {"QUIN_TDM_TX_0", NULL, "Quinary TDM0 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) {"QUIN_TDM_TX_1", NULL, "Quinary TDM1 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) {"QUIN_TDM_TX_2", NULL, "Quinary TDM2 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) {"QUIN_TDM_TX_3", NULL, "Quinary TDM3 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) {"QUIN_TDM_TX_4", NULL, "Quinary TDM4 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) {"QUIN_TDM_TX_5", NULL, "Quinary TDM5 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) {"QUIN_TDM_TX_6", NULL, "Quinary TDM6 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) {"QUIN_TDM_TX_7", NULL, "Quinary TDM7 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {"TERT_MI2S_TX", NULL, "Tertiary MI2S Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) {"PRI_MI2S_TX", NULL, "Primary MI2S Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) {"SEC_MI2S_TX", NULL, "Secondary MI2S Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {"QUAT_MI2S_TX", NULL, "Quaternary MI2S Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) {"WSA_CODEC_DMA_RX_0 Playback", NULL, "WSA_CODEC_DMA_RX_0"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) {"WSA_CODEC_DMA_TX_0", NULL, "WSA_CODEC_DMA_TX_0 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) {"WSA_CODEC_DMA_RX_1 Playback", NULL, "WSA_CODEC_DMA_RX_1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) {"WSA_CODEC_DMA_TX_1", NULL, "WSA_CODEC_DMA_TX_1 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) {"WSA_CODEC_DMA_TX_2", NULL, "WSA_CODEC_DMA_TX_2 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) {"VA_CODEC_DMA_TX_0", NULL, "VA_CODEC_DMA_TX_0 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) {"VA_CODEC_DMA_TX_1", NULL, "VA_CODEC_DMA_TX_1 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) {"VA_CODEC_DMA_TX_2", NULL, "VA_CODEC_DMA_TX_2 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) {"RX_CODEC_DMA_RX_0 Playback", NULL, "RX_CODEC_DMA_RX_0"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) {"TX_CODEC_DMA_TX_0", NULL, "TX_CODEC_DMA_TX_0 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) {"RX_CODEC_DMA_RX_1 Playback", NULL, "RX_CODEC_DMA_RX_1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) {"TX_CODEC_DMA_TX_1", NULL, "TX_CODEC_DMA_TX_1 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) {"RX_CODEC_DMA_RX_2 Playback", NULL, "RX_CODEC_DMA_RX_2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) {"TX_CODEC_DMA_TX_2", NULL, "TX_CODEC_DMA_TX_2 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) {"RX_CODEC_DMA_RX_3 Playback", NULL, "RX_CODEC_DMA_RX_3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) {"TX_CODEC_DMA_TX_3", NULL, "TX_CODEC_DMA_TX_3 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) {"RX_CODEC_DMA_RX_4 Playback", NULL, "RX_CODEC_DMA_RX_4"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) {"TX_CODEC_DMA_TX_4", NULL, "TX_CODEC_DMA_TX_4 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) {"RX_CODEC_DMA_RX_5 Playback", NULL, "RX_CODEC_DMA_RX_5"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) {"TX_CODEC_DMA_TX_5", NULL, "TX_CODEC_DMA_TX_5 Capture"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) {"RX_CODEC_DMA_RX_6 Playback", NULL, "RX_CODEC_DMA_RX_6"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) {"RX_CODEC_DMA_RX_7 Playback", NULL, "RX_CODEC_DMA_RX_7"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) static const struct snd_soc_dai_ops q6hdmi_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) .prepare = q6afe_dai_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) .hw_params = q6hdmi_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) .shutdown = q6afe_dai_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static const struct snd_soc_dai_ops q6i2s_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .prepare = q6afe_dai_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .hw_params = q6i2s_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) .set_fmt = q6i2s_set_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) .shutdown = q6afe_dai_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) .set_sysclk = q6afe_mi2s_set_sysclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static const struct snd_soc_dai_ops q6slim_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) .prepare = q6afe_dai_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) .hw_params = q6slim_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .shutdown = q6afe_dai_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .set_channel_map = q6slim_set_channel_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) static const struct snd_soc_dai_ops q6tdm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) .prepare = q6afe_dai_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) .shutdown = q6afe_dai_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) .set_sysclk = q6afe_mi2s_set_sysclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) .set_tdm_slot = q6tdm_set_tdm_slot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) .set_channel_map = q6tdm_set_channel_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) .hw_params = q6tdm_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) static const struct snd_soc_dai_ops q6dma_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) .prepare = q6afe_dai_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) .shutdown = q6afe_dai_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) .set_sysclk = q6afe_mi2s_set_sysclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) .set_channel_map = q6dma_set_channel_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .hw_params = q6dma_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) static int msm_dai_q6_dai_probe(struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) struct q6afe_port *port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) port = q6afe_port_get_from_id(dai->dev, dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) if (IS_ERR(port)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) dev_err(dai->dev, "Unable to get afe port\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) dai_data->port[dai->id] = port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) static int msm_dai_q6_dai_remove(struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) q6afe_port_put(dai_data->port[dai->id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) dai_data->port[dai->id] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) static struct snd_soc_dai_driver q6afe_dais[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) .stream_name = "HDMI Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) .rates = SNDRV_PCM_RATE_48000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) .channels_min = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) .rate_min = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) .ops = &q6hdmi_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) .id = HDMI_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) .name = "HDMI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) .name = "SLIMBUS_0_RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) .id = SLIMBUS_0_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) .stream_name = "Slimbus Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) .name = "SLIMBUS_0_TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) .id = SLIMBUS_0_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) .stream_name = "Slimbus Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) .stream_name = "Slimbus1 Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) .name = "SLIMBUS_1_RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) .id = SLIMBUS_1_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) .name = "SLIMBUS_1_TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) .id = SLIMBUS_1_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) .stream_name = "Slimbus1 Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) .stream_name = "Slimbus2 Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) .name = "SLIMBUS_2_RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) .id = SLIMBUS_2_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) .name = "SLIMBUS_2_TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) .id = SLIMBUS_2_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) .stream_name = "Slimbus2 Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) .stream_name = "Slimbus3 Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) .name = "SLIMBUS_3_RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) .id = SLIMBUS_3_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) .name = "SLIMBUS_3_TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) .id = SLIMBUS_3_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) .stream_name = "Slimbus3 Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) .stream_name = "Slimbus4 Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) .name = "SLIMBUS_4_RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) .id = SLIMBUS_4_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) .name = "SLIMBUS_4_TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) .id = SLIMBUS_4_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) .stream_name = "Slimbus4 Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) .stream_name = "Slimbus5 Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) .name = "SLIMBUS_5_RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) .id = SLIMBUS_5_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) .name = "SLIMBUS_5_TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) .id = SLIMBUS_5_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) .stream_name = "Slimbus5 Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) .stream_name = "Slimbus6 Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) .name = "SLIMBUS_6_RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) .id = SLIMBUS_6_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) .name = "SLIMBUS_6_TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) .ops = &q6slim_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) .id = SLIMBUS_6_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) .stream_name = "Slimbus6 Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) .stream_name = "Primary MI2S Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) SNDRV_PCM_RATE_16000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) .rate_max = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) .id = PRIMARY_MI2S_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) .name = "PRI_MI2S_RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) .ops = &q6i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) .stream_name = "Primary MI2S Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) SNDRV_PCM_RATE_16000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) .rate_max = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) .id = PRIMARY_MI2S_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) .name = "PRI_MI2S_TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) .ops = &q6i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) .stream_name = "Secondary MI2S Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) SNDRV_PCM_RATE_16000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) .formats = SNDRV_PCM_FMTBIT_S16_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) .rate_max = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) .name = "SEC_MI2S_RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) .id = SECONDARY_MI2S_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) .ops = &q6i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) .stream_name = "Secondary MI2S Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) SNDRV_PCM_RATE_16000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) .rate_max = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) .id = SECONDARY_MI2S_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) .name = "SEC_MI2S_TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) .ops = &q6i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) .stream_name = "Tertiary MI2S Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) SNDRV_PCM_RATE_16000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) .formats = SNDRV_PCM_FMTBIT_S16_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) .rate_max = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) .name = "TERT_MI2S_RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) .id = TERTIARY_MI2S_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) .ops = &q6i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) .stream_name = "Tertiary MI2S Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) SNDRV_PCM_RATE_16000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) .rate_max = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) .id = TERTIARY_MI2S_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) .name = "TERT_MI2S_TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) .ops = &q6i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) .stream_name = "Quaternary MI2S Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) SNDRV_PCM_RATE_16000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) .formats = SNDRV_PCM_FMTBIT_S16_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) .rate_max = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) .name = "QUAT_MI2S_RX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) .id = QUATERNARY_MI2S_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) .ops = &q6i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) .stream_name = "Quaternary MI2S Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) SNDRV_PCM_RATE_16000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) .rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) .rate_max = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) .id = QUATERNARY_MI2S_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) .name = "QUAT_MI2S_TX",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) .ops = &q6i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) Q6AFE_TDM_PB_DAI("Primary", 0, PRIMARY_TDM_RX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) Q6AFE_TDM_PB_DAI("Primary", 1, PRIMARY_TDM_RX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) Q6AFE_TDM_PB_DAI("Primary", 2, PRIMARY_TDM_RX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) Q6AFE_TDM_PB_DAI("Primary", 3, PRIMARY_TDM_RX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) Q6AFE_TDM_PB_DAI("Primary", 4, PRIMARY_TDM_RX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) Q6AFE_TDM_PB_DAI("Primary", 5, PRIMARY_TDM_RX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) Q6AFE_TDM_PB_DAI("Primary", 6, PRIMARY_TDM_RX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) Q6AFE_TDM_PB_DAI("Primary", 7, PRIMARY_TDM_RX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) Q6AFE_TDM_CAP_DAI("Primary", 0, PRIMARY_TDM_TX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) Q6AFE_TDM_CAP_DAI("Primary", 1, PRIMARY_TDM_TX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) Q6AFE_TDM_CAP_DAI("Primary", 2, PRIMARY_TDM_TX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) Q6AFE_TDM_CAP_DAI("Primary", 3, PRIMARY_TDM_TX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) Q6AFE_TDM_CAP_DAI("Primary", 4, PRIMARY_TDM_TX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) Q6AFE_TDM_CAP_DAI("Primary", 5, PRIMARY_TDM_TX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) Q6AFE_TDM_CAP_DAI("Primary", 6, PRIMARY_TDM_TX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) Q6AFE_TDM_CAP_DAI("Primary", 7, PRIMARY_TDM_TX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) Q6AFE_TDM_PB_DAI("Secondary", 0, SECONDARY_TDM_RX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) Q6AFE_TDM_PB_DAI("Secondary", 1, SECONDARY_TDM_RX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) Q6AFE_TDM_PB_DAI("Secondary", 2, SECONDARY_TDM_RX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) Q6AFE_TDM_PB_DAI("Secondary", 3, SECONDARY_TDM_RX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) Q6AFE_TDM_PB_DAI("Secondary", 4, SECONDARY_TDM_RX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) Q6AFE_TDM_PB_DAI("Secondary", 5, SECONDARY_TDM_RX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) Q6AFE_TDM_PB_DAI("Secondary", 6, SECONDARY_TDM_RX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) Q6AFE_TDM_PB_DAI("Secondary", 7, SECONDARY_TDM_RX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) Q6AFE_TDM_CAP_DAI("Secondary", 0, SECONDARY_TDM_TX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) Q6AFE_TDM_CAP_DAI("Secondary", 1, SECONDARY_TDM_TX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) Q6AFE_TDM_CAP_DAI("Secondary", 2, SECONDARY_TDM_TX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) Q6AFE_TDM_CAP_DAI("Secondary", 3, SECONDARY_TDM_TX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) Q6AFE_TDM_CAP_DAI("Secondary", 4, SECONDARY_TDM_TX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) Q6AFE_TDM_CAP_DAI("Secondary", 5, SECONDARY_TDM_TX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) Q6AFE_TDM_CAP_DAI("Secondary", 6, SECONDARY_TDM_TX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) Q6AFE_TDM_CAP_DAI("Secondary", 7, SECONDARY_TDM_TX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) Q6AFE_TDM_PB_DAI("Tertiary", 0, TERTIARY_TDM_RX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) Q6AFE_TDM_PB_DAI("Tertiary", 1, TERTIARY_TDM_RX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) Q6AFE_TDM_PB_DAI("Tertiary", 2, TERTIARY_TDM_RX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) Q6AFE_TDM_PB_DAI("Tertiary", 3, TERTIARY_TDM_RX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) Q6AFE_TDM_PB_DAI("Tertiary", 4, TERTIARY_TDM_RX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) Q6AFE_TDM_PB_DAI("Tertiary", 5, TERTIARY_TDM_RX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) Q6AFE_TDM_PB_DAI("Tertiary", 6, TERTIARY_TDM_RX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) Q6AFE_TDM_PB_DAI("Tertiary", 7, TERTIARY_TDM_RX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) Q6AFE_TDM_CAP_DAI("Tertiary", 0, TERTIARY_TDM_TX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) Q6AFE_TDM_CAP_DAI("Tertiary", 1, TERTIARY_TDM_TX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) Q6AFE_TDM_CAP_DAI("Tertiary", 2, TERTIARY_TDM_TX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) Q6AFE_TDM_CAP_DAI("Tertiary", 3, TERTIARY_TDM_TX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) Q6AFE_TDM_CAP_DAI("Tertiary", 4, TERTIARY_TDM_TX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) Q6AFE_TDM_CAP_DAI("Tertiary", 5, TERTIARY_TDM_TX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) Q6AFE_TDM_CAP_DAI("Tertiary", 6, TERTIARY_TDM_TX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) Q6AFE_TDM_CAP_DAI("Tertiary", 7, TERTIARY_TDM_TX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) Q6AFE_TDM_PB_DAI("Quaternary", 0, QUATERNARY_TDM_RX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) Q6AFE_TDM_PB_DAI("Quaternary", 1, QUATERNARY_TDM_RX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) Q6AFE_TDM_PB_DAI("Quaternary", 2, QUATERNARY_TDM_RX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) Q6AFE_TDM_PB_DAI("Quaternary", 3, QUATERNARY_TDM_RX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) Q6AFE_TDM_PB_DAI("Quaternary", 4, QUATERNARY_TDM_RX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) Q6AFE_TDM_PB_DAI("Quaternary", 5, QUATERNARY_TDM_RX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) Q6AFE_TDM_PB_DAI("Quaternary", 6, QUATERNARY_TDM_RX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) Q6AFE_TDM_PB_DAI("Quaternary", 7, QUATERNARY_TDM_RX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) Q6AFE_TDM_CAP_DAI("Quaternary", 0, QUATERNARY_TDM_TX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) Q6AFE_TDM_CAP_DAI("Quaternary", 1, QUATERNARY_TDM_TX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) Q6AFE_TDM_CAP_DAI("Quaternary", 2, QUATERNARY_TDM_TX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) Q6AFE_TDM_CAP_DAI("Quaternary", 3, QUATERNARY_TDM_TX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) Q6AFE_TDM_CAP_DAI("Quaternary", 4, QUATERNARY_TDM_TX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) Q6AFE_TDM_CAP_DAI("Quaternary", 5, QUATERNARY_TDM_TX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) Q6AFE_TDM_CAP_DAI("Quaternary", 6, QUATERNARY_TDM_TX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) Q6AFE_TDM_CAP_DAI("Quaternary", 7, QUATERNARY_TDM_TX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) Q6AFE_TDM_PB_DAI("Quinary", 0, QUINARY_TDM_RX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) Q6AFE_TDM_PB_DAI("Quinary", 1, QUINARY_TDM_RX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) Q6AFE_TDM_PB_DAI("Quinary", 2, QUINARY_TDM_RX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) Q6AFE_TDM_PB_DAI("Quinary", 3, QUINARY_TDM_RX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) Q6AFE_TDM_PB_DAI("Quinary", 4, QUINARY_TDM_RX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) Q6AFE_TDM_PB_DAI("Quinary", 5, QUINARY_TDM_RX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) Q6AFE_TDM_PB_DAI("Quinary", 6, QUINARY_TDM_RX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) Q6AFE_TDM_PB_DAI("Quinary", 7, QUINARY_TDM_RX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) Q6AFE_TDM_CAP_DAI("Quinary", 0, QUINARY_TDM_TX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) Q6AFE_TDM_CAP_DAI("Quinary", 1, QUINARY_TDM_TX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) Q6AFE_TDM_CAP_DAI("Quinary", 2, QUINARY_TDM_TX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) Q6AFE_TDM_CAP_DAI("Quinary", 3, QUINARY_TDM_TX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) Q6AFE_TDM_CAP_DAI("Quinary", 4, QUINARY_TDM_TX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) Q6AFE_TDM_CAP_DAI("Quinary", 5, QUINARY_TDM_TX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) Q6AFE_TDM_CAP_DAI("Quinary", 6, QUINARY_TDM_TX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) Q6AFE_TDM_CAP_DAI("Quinary", 7, QUINARY_TDM_TX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) .stream_name = "Display Port Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) .rates = SNDRV_PCM_RATE_48000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) .formats = SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) SNDRV_PCM_FMTBIT_S24_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) .channels_min = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) .channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) .rate_max = 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) .rate_min = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) .ops = &q6hdmi_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) .id = DISPLAY_PORT_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) .name = "DISPLAY_PORT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) .probe = msm_dai_q6_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) .remove = msm_dai_q6_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) static int q6afe_of_xlate_dai_name(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) struct of_phandle_args *args,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) const char **dai_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) int id = args->args[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) int ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) for (i = 0; i < ARRAY_SIZE(q6afe_dais); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) if (q6afe_dais[i].id == id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) *dai_name = q6afe_dais[i].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) static const struct snd_soc_dapm_widget q6afe_dai_widgets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) SND_SOC_DAPM_AIF_IN("HDMI_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) SND_SOC_DAPM_AIF_IN("SLIMBUS_0_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) SND_SOC_DAPM_AIF_IN("SLIMBUS_1_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) SND_SOC_DAPM_AIF_IN("SLIMBUS_2_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) SND_SOC_DAPM_AIF_IN("SLIMBUS_3_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) SND_SOC_DAPM_AIF_IN("SLIMBUS_4_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) SND_SOC_DAPM_AIF_IN("SLIMBUS_5_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) SND_SOC_DAPM_AIF_IN("SLIMBUS_6_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) SND_SOC_DAPM_AIF_OUT("SLIMBUS_0_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) SND_SOC_DAPM_AIF_OUT("SLIMBUS_1_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) SND_SOC_DAPM_AIF_OUT("SLIMBUS_2_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) SND_SOC_DAPM_AIF_OUT("SLIMBUS_3_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) SND_SOC_DAPM_AIF_OUT("SLIMBUS_4_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) SND_SOC_DAPM_AIF_OUT("SLIMBUS_5_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) SND_SOC_DAPM_AIF_OUT("SLIMBUS_6_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) SND_SOC_DAPM_AIF_IN("QUAT_MI2S_RX", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) SND_SOC_DAPM_AIF_OUT("QUAT_MI2S_TX", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) SND_SOC_DAPM_AIF_IN("TERT_MI2S_RX", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) SND_SOC_DAPM_AIF_OUT("TERT_MI2S_TX", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) SND_SOC_DAPM_AIF_IN("SEC_MI2S_RX", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) SND_SOC_DAPM_AIF_OUT("SEC_MI2S_TX", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) SND_SOC_DAPM_AIF_IN("SEC_MI2S_RX_SD1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) "Secondary MI2S Playback SD1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) SND_SOC_DAPM_AIF_IN("PRI_MI2S_RX", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) SND_SOC_DAPM_AIF_OUT("PRI_MI2S_TX", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_0", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_1", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_2", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_3", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_4", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_5", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_6", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_7", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_0", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_1", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_2", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_3", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_4", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_5", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_6", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_7", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_0", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_1", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_2", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_3", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_4", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_5", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_6", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_7", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_0", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_1", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_2", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_3", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_4", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_5", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_6", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_7", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_0", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_1", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_2", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_3", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_4", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_5", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_6", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_7", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_0", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_1", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_2", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_3", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_4", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_5", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_6", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_7", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_0", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_1", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_2", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_3", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_4", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_5", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_6", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_7", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_0", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_1", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_2", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_3", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_4", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_5", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_6", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_7", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_0", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_1", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_2", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_3", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_4", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_5", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_6", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_7", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_0", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_1", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_2", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_3", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_4", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_5", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_6", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_7", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) SND_SOC_DAPM_AIF_OUT("DISPLAY_PORT_RX", "NULL", 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_0", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_0", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_1", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_1", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_2", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_0", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_1", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_2", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_0", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_0", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_1", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_1", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_2", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_2", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_3", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_3", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_4", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_4", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_5", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_5", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_6", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_7", "NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) 0, SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) static const struct snd_soc_component_driver q6afe_dai_component = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) .name = "q6afe-dai-component",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) .dapm_widgets = q6afe_dai_widgets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) .num_dapm_widgets = ARRAY_SIZE(q6afe_dai_widgets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) .dapm_routes = q6afe_dapm_routes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) .num_dapm_routes = ARRAY_SIZE(q6afe_dapm_routes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) .of_xlate_dai_name = q6afe_of_xlate_dai_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) static void of_q6afe_parse_dai_data(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) struct q6afe_dai_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) for_each_child_of_node(dev->of_node, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) unsigned int lines[Q6AFE_MAX_MI2S_LINES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) struct q6afe_dai_priv_data *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) int id, i, num_lines;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) ret = of_property_read_u32(node, "reg", &id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) if (ret || id < 0 || id >= AFE_PORT_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) dev_err(dev, "valid dai id not found:%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) /* MI2S specific properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) priv = &data->priv[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) ret = of_property_read_variable_u32_array(node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) "qcom,sd-lines",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) lines, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) Q6AFE_MAX_MI2S_LINES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) num_lines = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) num_lines = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) priv->sd_line_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) for (i = 0; i < num_lines; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) priv->sd_line_mask |= BIT(lines[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) priv = &data->priv[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) ret = of_property_read_u32(node, "qcom,tdm-sync-mode",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) &priv->sync_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) dev_err(dev, "No Sync mode from DT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) ret = of_property_read_u32(node, "qcom,tdm-sync-src",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) &priv->sync_src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) dev_err(dev, "No Sync Src from DT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) ret = of_property_read_u32(node, "qcom,tdm-data-out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) &priv->data_out_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) dev_err(dev, "No Data out enable from DT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) ret = of_property_read_u32(node, "qcom,tdm-invert-sync",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) &priv->invert_sync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) dev_err(dev, "No Invert sync from DT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) ret = of_property_read_u32(node, "qcom,tdm-data-delay",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) &priv->data_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) dev_err(dev, "No Data Delay from DT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) ret = of_property_read_u32(node, "qcom,tdm-data-align",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) &priv->data_align);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) dev_err(dev, "No Data align from DT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) static int q6afe_dai_dev_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) struct q6afe_dai_data *dai_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) dai_data = devm_kzalloc(dev, sizeof(*dai_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) if (!dai_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) dev_set_drvdata(dev, dai_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) of_q6afe_parse_dai_data(dev, dai_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) return devm_snd_soc_register_component(dev, &q6afe_dai_component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) q6afe_dais, ARRAY_SIZE(q6afe_dais));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) static const struct of_device_id q6afe_dai_device_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) { .compatible = "qcom,q6afe-dais" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) MODULE_DEVICE_TABLE(of, q6afe_dai_device_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) static struct platform_driver q6afe_dai_platform_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) .name = "q6afe-dai",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) .of_match_table = of_match_ptr(q6afe_dai_device_id),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) .probe = q6afe_dai_dev_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) module_platform_driver(q6afe_dai_platform_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) MODULE_DESCRIPTION("Q6 Audio Fronend dai driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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