Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * linux/sound/soc/pxa/mmp-pcm.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2011 Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/dmaengine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/platform_data/dma-mmp_tdma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/platform_data/mmp_audio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <sound/pxa2xx-lib.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <sound/dmaengine_pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define DRV_NAME "mmp-pcm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) struct mmp_dma_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	int ssp_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	struct resource *dma_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define MMP_PCM_INFO (SNDRV_PCM_INFO_MMAP |	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		SNDRV_PCM_INFO_MMAP_VALID |	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		SNDRV_PCM_INFO_INTERLEAVED |	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		SNDRV_PCM_INFO_PAUSE |		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		SNDRV_PCM_INFO_RESUME |		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		SNDRV_PCM_INFO_NO_PERIOD_WAKEUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) static struct snd_pcm_hardware mmp_pcm_hardware[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		.info			= MMP_PCM_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		.period_bytes_min	= 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		.period_bytes_max	= 2048,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		.periods_min		= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		.periods_max		= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		.buffer_bytes_max	= 4096,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		.fifo_size		= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		.info			= MMP_PCM_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		.period_bytes_min	= 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		.period_bytes_max	= 2048,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		.periods_min		= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		.periods_max		= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		.buffer_bytes_max	= 4096,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		.fifo_size		= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static int mmp_pcm_hw_params(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 			     struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 			     struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	struct dma_slave_config slave_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	ret =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	    snd_dmaengine_pcm_prepare_slave_config(substream, params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 						   &slave_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	ret = dmaengine_slave_config(chan, &slave_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int mmp_pcm_trigger(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 			   struct snd_pcm_substream *substream, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	return snd_dmaengine_pcm_trigger(substream, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static snd_pcm_uframes_t mmp_pcm_pointer(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 					 struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	return snd_dmaengine_pcm_pointer(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static bool filter(struct dma_chan *chan, void *param)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	struct mmp_dma_data *dma_data = param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	bool found = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	char *devname;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	devname = kasprintf(GFP_KERNEL, "%s.%d", dma_data->dma_res->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		dma_data->ssp_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	if ((strcmp(dev_name(chan->device->dev), devname) == 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		(chan->chan_id == dma_data->dma_res->start)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		found = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	kfree(devname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	return found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int mmp_pcm_open(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	struct platform_device *pdev = to_platform_device(component->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	struct mmp_dma_data dma_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	struct resource *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	r = platform_get_resource(pdev, IORESOURCE_DMA, substream->stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	if (!r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	snd_soc_set_runtime_hwparams(substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 				&mmp_pcm_hardware[substream->stream]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	dma_data.dma_res = r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	dma_data.ssp_id = cpu_dai->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	return snd_dmaengine_pcm_open_request_chan(substream, filter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		    &dma_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int mmp_pcm_close(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			 struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	return snd_dmaengine_pcm_close_release_chan(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int mmp_pcm_mmap(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			struct vm_area_struct *vma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	unsigned long off = vma->vm_pgoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	return remap_pfn_range(vma, vma->vm_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		__phys_to_pfn(runtime->dma_addr) + off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		vma->vm_end - vma->vm_start, vma->vm_page_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static void mmp_pcm_free_dma_buffers(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 				     struct snd_pcm *pcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct snd_pcm_substream *substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	struct snd_dma_buffer *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	int stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	struct gen_pool *gpool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	gpool = sram_get_gpool("asram");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (!gpool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	for (stream = 0; stream < 2; stream++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		size_t size = mmp_pcm_hardware[stream].buffer_bytes_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		substream = pcm->streams[stream].substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		if (!substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		buf = &substream->dma_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		if (!buf->area)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		gen_pool_free(gpool, (unsigned long)buf->area, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		buf->area = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static int mmp_pcm_preallocate_dma_buffer(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 								int stream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct snd_dma_buffer *buf = &substream->dma_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	size_t size = mmp_pcm_hardware[stream].buffer_bytes_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	struct gen_pool *gpool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	buf->dev.type = SNDRV_DMA_TYPE_DEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	buf->dev.dev = substream->pcm->card->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	buf->private_data = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	gpool = sram_get_gpool("asram");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	if (!gpool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	buf->area = gen_pool_dma_alloc(gpool, size, &buf->addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	if (!buf->area)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	buf->bytes = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static int mmp_pcm_new(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		       struct snd_soc_pcm_runtime *rtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	struct snd_pcm_substream *substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	struct snd_pcm *pcm = rtd->pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	int ret = 0, stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	for (stream = 0; stream < 2; stream++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		substream = pcm->streams[stream].substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		ret = mmp_pcm_preallocate_dma_buffer(substream,	stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	mmp_pcm_free_dma_buffers(component, pcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static const struct snd_soc_component_driver mmp_soc_component = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	.name		= DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	.open		= mmp_pcm_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	.close		= mmp_pcm_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	.hw_params	= mmp_pcm_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	.trigger	= mmp_pcm_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	.pointer	= mmp_pcm_pointer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	.mmap		= mmp_pcm_mmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	.pcm_construct	= mmp_pcm_new,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	.pcm_destruct	= mmp_pcm_free_dma_buffers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static int mmp_pcm_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	struct mmp_audio_platdata *pdata = pdev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	if (pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		mmp_pcm_hardware[SNDRV_PCM_STREAM_PLAYBACK].buffer_bytes_max =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 						pdata->buffer_max_playback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		mmp_pcm_hardware[SNDRV_PCM_STREAM_PLAYBACK].period_bytes_max =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 						pdata->period_max_playback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		mmp_pcm_hardware[SNDRV_PCM_STREAM_CAPTURE].buffer_bytes_max =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 						pdata->buffer_max_capture;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		mmp_pcm_hardware[SNDRV_PCM_STREAM_CAPTURE].period_bytes_max =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 						pdata->period_max_capture;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	return devm_snd_soc_register_component(&pdev->dev, &mmp_soc_component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 					       NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static struct platform_driver mmp_pcm_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		.name = "mmp-pcm-audio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	.probe = mmp_pcm_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) module_platform_driver(mmp_pcm_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) MODULE_DESCRIPTION("MMP Soc Audio DMA module");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) MODULE_ALIAS("platform:mmp-pcm-audio");