^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2018 BayLibre, SAS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Jerome Brunet <jbrunet@baylibre.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef _MESON_AIU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define _MESON_AIU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) struct clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) struct clk_bulk_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) struct device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) struct of_phandle_args;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct snd_soc_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct snd_soc_dai_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) enum aiu_clk_ids {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) PCLK = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) AOCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MIXER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct aiu_interface {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct clk_bulk_data *clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned int clk_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct aiu_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) bool has_acodec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) bool has_clk_ctrl_more_i2s_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct aiu {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct clk *pclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct clk *spdif_mclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct aiu_interface i2s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct aiu_interface spdif;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) const struct aiu_platform_data *platform;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define AIU_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) SNDRV_PCM_FMTBIT_S20_LE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) SNDRV_PCM_FMTBIT_S24_LE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int aiu_of_xlate_dai_name(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct of_phandle_args *args,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) const char **dai_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) unsigned int component_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int aiu_hdmi_ctrl_register_component(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int aiu_acodec_ctrl_register_component(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int aiu_fifo_i2s_dai_probe(struct snd_soc_dai *dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int aiu_fifo_spdif_dai_probe(struct snd_soc_dai *dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) extern const struct snd_soc_dai_ops aiu_fifo_i2s_dai_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) extern const struct snd_soc_dai_ops aiu_fifo_spdif_dai_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) extern const struct snd_soc_dai_ops aiu_encoder_i2s_dai_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) extern const struct snd_soc_dai_ops aiu_encoder_spdif_dai_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define AIU_IEC958_BPF 0x000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define AIU_958_MISC 0x010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define AIU_IEC958_DCU_FF_CTRL 0x01c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define AIU_958_CHSTAT_L0 0x020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define AIU_958_CHSTAT_L1 0x024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define AIU_958_CTRL 0x028
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define AIU_I2S_SOURCE_DESC 0x034
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define AIU_I2S_DAC_CFG 0x040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define AIU_I2S_SYNC 0x044
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define AIU_I2S_MISC 0x048
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define AIU_RST_SOFT 0x054
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define AIU_CLK_CTRL 0x058
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define AIU_CLK_CTRL_MORE 0x064
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define AIU_CODEC_DAC_LRCLK_CTRL 0x0a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define AIU_HDMI_CLK_DATA_CTRL 0x0a8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define AIU_ACODEC_CTRL 0x0b0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define AIU_958_CHSTAT_R0 0x0c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define AIU_958_CHSTAT_R1 0x0c4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define AIU_MEM_I2S_START 0x180
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define AIU_MEM_I2S_MASKS 0x18c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define AIU_MEM_I2S_CONTROL 0x190
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define AIU_MEM_IEC958_START 0x194
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define AIU_MEM_IEC958_CONTROL 0x1a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define AIU_MEM_I2S_BUF_CNTL 0x1d8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define AIU_MEM_IEC958_BUF_CNTL 0x1fc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #endif /* _MESON_AIU_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags