Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // Copyright (c) 2020 BayLibre, SAS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) // Author: Jerome Brunet <jbrunet@baylibre.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/bitfield.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/reset.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <sound/soc-dai.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <dt-bindings/sound/meson-aiu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include "aiu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include "aiu-fifo.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define AIU_I2S_MISC_958_SRC_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) static const char * const aiu_spdif_encode_sel_texts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	"SPDIF", "I2S",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) static SOC_ENUM_SINGLE_DECL(aiu_spdif_encode_sel_enum, AIU_I2S_MISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 			    AIU_I2S_MISC_958_SRC_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 			    aiu_spdif_encode_sel_texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static const struct snd_kcontrol_new aiu_spdif_encode_mux =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	SOC_DAPM_ENUM("SPDIF Buffer Src", aiu_spdif_encode_sel_enum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) static const struct snd_soc_dapm_widget aiu_cpu_dapm_widgets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	SND_SOC_DAPM_MUX("SPDIF SRC SEL", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 			 &aiu_spdif_encode_mux),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) static const struct snd_soc_dapm_route aiu_cpu_dapm_routes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	{ "I2S Encoder Playback", NULL, "I2S FIFO Playback" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	{ "SPDIF SRC SEL", "SPDIF", "SPDIF FIFO Playback" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	{ "SPDIF SRC SEL", "I2S", "I2S FIFO Playback" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	{ "SPDIF Encoder Playback", NULL, "SPDIF SRC SEL" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) int aiu_of_xlate_dai_name(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 			  struct of_phandle_args *args,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 			  const char **dai_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 			  unsigned int component_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	struct snd_soc_dai *dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	if (args->args_count != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	if (args->args[0] != component_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	id = args->args[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if (id < 0 || id >= component->num_dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	for_each_component_dais(component, dai) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		if (id == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		id--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	*dai_name = dai->driver->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) static int aiu_cpu_of_xlate_dai_name(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 				     struct of_phandle_args *args,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 				     const char **dai_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	return aiu_of_xlate_dai_name(component, args, dai_name, AIU_CPU);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int aiu_cpu_component_probe(struct snd_soc_component *component)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct aiu *aiu = snd_soc_component_get_drvdata(component);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	/* Required for the SPDIF Source control operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	return clk_prepare_enable(aiu->i2s.clks[PCLK].clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static void aiu_cpu_component_remove(struct snd_soc_component *component)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct aiu *aiu = snd_soc_component_get_drvdata(component);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	clk_disable_unprepare(aiu->i2s.clks[PCLK].clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) static const struct snd_soc_component_driver aiu_cpu_component = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.name			= "AIU CPU",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	.dapm_widgets		= aiu_cpu_dapm_widgets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	.num_dapm_widgets	= ARRAY_SIZE(aiu_cpu_dapm_widgets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	.dapm_routes		= aiu_cpu_dapm_routes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	.num_dapm_routes	= ARRAY_SIZE(aiu_cpu_dapm_routes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	.of_xlate_dai_name	= aiu_cpu_of_xlate_dai_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	.pointer		= aiu_fifo_pointer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	.probe			= aiu_cpu_component_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	.remove			= aiu_cpu_component_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static struct snd_soc_dai_driver aiu_cpu_dai_drv[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	[CPU_I2S_FIFO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		.name = "I2S FIFO",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		.playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			.stream_name	= "I2S FIFO Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 			.channels_min	= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			.channels_max	= 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 			.rates		= SNDRV_PCM_RATE_CONTINUOUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 			.rate_min	= 5512,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			.rate_max	= 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			.formats	= AIU_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		.ops		= &aiu_fifo_i2s_dai_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		.pcm_new	= aiu_fifo_pcm_new,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		.probe		= aiu_fifo_i2s_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		.remove		= aiu_fifo_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	[CPU_SPDIF_FIFO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		.name = "SPDIF FIFO",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		.playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			.stream_name	= "SPDIF FIFO Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			.channels_min	= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			.channels_max	= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 			.rates		= SNDRV_PCM_RATE_CONTINUOUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			.rate_min	= 5512,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			.rate_max	= 192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			.formats	= AIU_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		.ops		= &aiu_fifo_spdif_dai_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		.pcm_new	= aiu_fifo_pcm_new,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		.probe		= aiu_fifo_spdif_dai_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		.remove		= aiu_fifo_dai_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	[CPU_I2S_ENCODER] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		.name = "I2S Encoder",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		.playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			.stream_name = "I2S Encoder Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			.channels_min = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 			.channels_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 			.rates = SNDRV_PCM_RATE_8000_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 			.formats = AIU_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		.ops = &aiu_encoder_i2s_dai_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	[CPU_SPDIF_ENCODER] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		.name = "SPDIF Encoder",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		.playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 			.stream_name = "SPDIF Encoder Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 			.channels_min = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			.channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			.rates = (SNDRV_PCM_RATE_32000  |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 				  SNDRV_PCM_RATE_44100  |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 				  SNDRV_PCM_RATE_48000  |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 				  SNDRV_PCM_RATE_88200  |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 				  SNDRV_PCM_RATE_96000  |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 				  SNDRV_PCM_RATE_176400 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 				  SNDRV_PCM_RATE_192000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			.formats = AIU_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		.ops = &aiu_encoder_spdif_dai_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static const struct regmap_config aiu_regmap_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.reg_bits	= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.val_bits	= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	.reg_stride	= 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.max_register	= 0x2ac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int aiu_clk_bulk_get(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 			    const char * const *ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 			    unsigned int num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			    struct aiu_interface *interface)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct clk_bulk_data *clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	clks = devm_kcalloc(dev, num, sizeof(*clks), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	if (!clks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	for (i = 0; i < num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		clks[i].id = ids[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	ret = devm_clk_bulk_get(dev, num, clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	interface->clks = clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	interface->clk_num = num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static const char * const aiu_i2s_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	[PCLK]	= "i2s_pclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	[AOCLK]	= "i2s_aoclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	[MCLK]	= "i2s_mclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	[MIXER]	= "i2s_mixer",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static const char * const aiu_spdif_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	[PCLK]	= "spdif_pclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	[AOCLK]	= "spdif_aoclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	[MCLK]	= "spdif_mclk_sel"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static int aiu_clk_get(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	struct aiu *aiu = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	aiu->pclk = devm_clk_get(dev, "pclk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	if (IS_ERR(aiu->pclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		if (PTR_ERR(aiu->pclk) != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			dev_err(dev, "Can't get the aiu pclk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		return PTR_ERR(aiu->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	aiu->spdif_mclk = devm_clk_get(dev, "spdif_mclk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	if (IS_ERR(aiu->spdif_mclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		if (PTR_ERR(aiu->spdif_mclk) != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 			dev_err(dev, "Can't get the aiu spdif master clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		return PTR_ERR(aiu->spdif_mclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	ret = aiu_clk_bulk_get(dev, aiu_i2s_ids, ARRAY_SIZE(aiu_i2s_ids),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			       &aiu->i2s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		if (ret != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			dev_err(dev, "Can't get the i2s clocks\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	ret = aiu_clk_bulk_get(dev, aiu_spdif_ids, ARRAY_SIZE(aiu_spdif_ids),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			       &aiu->spdif);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		if (ret != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 			dev_err(dev, "Can't get the spdif clocks\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	ret = clk_prepare_enable(aiu->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		dev_err(dev, "peripheral clock enable failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	ret = devm_add_action_or_reset(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 				       (void(*)(void *))clk_disable_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 				       aiu->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		dev_err(dev, "failed to add reset action on pclk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static int aiu_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	void __iomem *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	struct regmap *map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	struct aiu *aiu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	aiu = devm_kzalloc(dev, sizeof(*aiu), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	if (!aiu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	aiu->platform = device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	if (!aiu->platform)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	platform_set_drvdata(pdev, aiu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	ret = device_reset(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		if (ret != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 			dev_err(dev, "Failed to reset device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	regs = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	if (IS_ERR(regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		return PTR_ERR(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	map = devm_regmap_init_mmio(dev, regs, &aiu_regmap_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	if (IS_ERR(map)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		dev_err(dev, "failed to init regmap: %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 			PTR_ERR(map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		return PTR_ERR(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	aiu->i2s.irq = platform_get_irq_byname(pdev, "i2s");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	if (aiu->i2s.irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 		return aiu->i2s.irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	aiu->spdif.irq = platform_get_irq_byname(pdev, "spdif");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	if (aiu->spdif.irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		return aiu->spdif.irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	ret = aiu_clk_get(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	/* Register the cpu component of the aiu */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	ret = snd_soc_register_component(dev, &aiu_cpu_component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 					 aiu_cpu_dai_drv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 					 ARRAY_SIZE(aiu_cpu_dai_drv));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 		dev_err(dev, "Failed to register cpu component\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	/* Register the hdmi codec control component */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	ret = aiu_hdmi_ctrl_register_component(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		dev_err(dev, "Failed to register hdmi control component\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	/* Register the internal dac control component on gxl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	if (aiu->platform->has_acodec) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		ret = aiu_acodec_ctrl_register_component(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 			dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 			    "Failed to register acodec control component\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 			goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	snd_soc_unregister_component(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static int aiu_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	snd_soc_unregister_component(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static const struct aiu_platform_data aiu_gxbb_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	.has_acodec = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	.has_clk_ctrl_more_i2s_div = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static const struct aiu_platform_data aiu_gxl_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	.has_acodec = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	.has_clk_ctrl_more_i2s_div = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) static const struct aiu_platform_data aiu_meson8_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	.has_acodec = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	.has_clk_ctrl_more_i2s_div = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static const struct of_device_id aiu_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	{ .compatible = "amlogic,aiu-gxbb", .data = &aiu_gxbb_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	{ .compatible = "amlogic,aiu-gxl", .data = &aiu_gxl_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	{ .compatible = "amlogic,aiu-meson8", .data = &aiu_meson8_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	{ .compatible = "amlogic,aiu-meson8b", .data = &aiu_meson8_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) MODULE_DEVICE_TABLE(of, aiu_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static struct platform_driver aiu_pdrv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	.probe = aiu_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	.remove = aiu_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		.name = "meson-aiu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		.of_match_table = aiu_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) module_platform_driver(aiu_pdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) MODULE_DESCRIPTION("Meson AIU Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) MODULE_LICENSE("GPL v2");