^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright (c) 2020 BayLibre, SAS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // Author: Jerome Brunet <jbrunet@baylibre.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/bitfield.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <sound/soc-dai.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "aiu-fifo.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define AIU_MEM_START 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define AIU_MEM_RD 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define AIU_MEM_END 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define AIU_MEM_MASKS 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define AIU_MEM_MASK_CH_RD GENMASK(7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define AIU_MEM_MASK_CH_MEM GENMASK(15, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define AIU_MEM_CONTROL 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define AIU_MEM_CONTROL_INIT BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define AIU_MEM_CONTROL_FILL_EN BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define AIU_MEM_CONTROL_EMPTY_EN BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static struct snd_soc_dai *aiu_fifo_dai(struct snd_pcm_substream *ss)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct snd_soc_pcm_runtime *rtd = ss->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) return asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) snd_pcm_uframes_t aiu_fifo_pointer(struct snd_soc_component *component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct snd_soc_dai *dai = aiu_fifo_dai(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct aiu_fifo *fifo = dai->playback_dma_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) unsigned int addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) addr = snd_soc_component_read(component, fifo->mem_offset + AIU_MEM_RD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return bytes_to_frames(runtime, addr - (unsigned int)runtime->dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static void aiu_fifo_enable(struct snd_soc_dai *dai, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct snd_soc_component *component = dai->component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct aiu_fifo *fifo = dai->playback_dma_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) unsigned int en_mask = (AIU_MEM_CONTROL_FILL_EN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) AIU_MEM_CONTROL_EMPTY_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) snd_soc_component_update_bits(component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) fifo->mem_offset + AIU_MEM_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) en_mask, enable ? en_mask : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int aiu_fifo_trigger(struct snd_pcm_substream *substream, int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) case SNDRV_PCM_TRIGGER_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) case SNDRV_PCM_TRIGGER_RESUME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) aiu_fifo_enable(dai, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) case SNDRV_PCM_TRIGGER_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) case SNDRV_PCM_TRIGGER_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) aiu_fifo_enable(dai, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int aiu_fifo_prepare(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct snd_soc_component *component = dai->component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct aiu_fifo *fifo = dai->playback_dma_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) snd_soc_component_update_bits(component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) fifo->mem_offset + AIU_MEM_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) AIU_MEM_CONTROL_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) AIU_MEM_CONTROL_INIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) snd_soc_component_update_bits(component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) fifo->mem_offset + AIU_MEM_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) AIU_MEM_CONTROL_INIT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int aiu_fifo_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct snd_soc_component *component = dai->component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct aiu_fifo *fifo = dai->playback_dma_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) dma_addr_t end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* Setup the fifo boundaries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) end = runtime->dma_addr + runtime->dma_bytes - fifo->fifo_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) snd_soc_component_write(component, fifo->mem_offset + AIU_MEM_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) runtime->dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) snd_soc_component_write(component, fifo->mem_offset + AIU_MEM_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) runtime->dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) snd_soc_component_write(component, fifo->mem_offset + AIU_MEM_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* Setup the fifo to read all the memory - no skip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) snd_soc_component_update_bits(component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) fifo->mem_offset + AIU_MEM_MASKS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) AIU_MEM_MASK_CH_RD | AIU_MEM_MASK_CH_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) FIELD_PREP(AIU_MEM_MASK_CH_RD, 0xff) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) FIELD_PREP(AIU_MEM_MASK_CH_MEM, 0xff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int aiu_fifo_hw_free(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return snd_pcm_lib_free_pages(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static irqreturn_t aiu_fifo_isr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct snd_pcm_substream *playback = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) snd_pcm_period_elapsed(playback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int aiu_fifo_startup(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct aiu_fifo *fifo = dai->playback_dma_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) snd_soc_set_runtime_hwparams(substream, fifo->pcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * Make sure the buffer and period size are multiple of the fifo burst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) ret = snd_pcm_hw_constraint_step(substream->runtime, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) fifo->fifo_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ret = snd_pcm_hw_constraint_step(substream->runtime, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) fifo->fifo_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ret = clk_prepare_enable(fifo->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ret = request_irq(fifo->irq, aiu_fifo_isr, 0, dev_name(dai->dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) clk_disable_unprepare(fifo->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) void aiu_fifo_shutdown(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct aiu_fifo *fifo = dai->playback_dma_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) free_irq(fifo->irq, substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) clk_disable_unprepare(fifo->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) int aiu_fifo_pcm_new(struct snd_soc_pcm_runtime *rtd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct snd_pcm_substream *substream =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) rtd->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct snd_card *card = rtd->card->snd_card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct aiu_fifo *fifo = dai->playback_dma_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) size_t size = fifo->pcm->buffer_bytes_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) snd_pcm_lib_preallocate_pages(substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) SNDRV_DMA_TYPE_DEV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) card->dev, size, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int aiu_fifo_dai_probe(struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) struct aiu_fifo *fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) fifo = kzalloc(sizeof(*fifo), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (!fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) dai->playback_dma_data = fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) int aiu_fifo_dai_remove(struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) kfree(dai->playback_dma_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags