^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // mt8183-mt6358.c --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // MT8183-MT6358-TS3A227-MAX98357 ALSA SoC machine driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Copyright (c) 2018 MediaTek Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) // Author: Shunli Wang <shunli.wang@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/pinctrl/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <sound/jack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "../../codecs/rt1015.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "../../codecs/ts3a227e.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "mt8183-afe-common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define RT1015_CODEC_DAI "rt1015-aif"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RT1015_DEV0_NAME "rt1015.6-0028"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RT1015_DEV1_NAME "rt1015.6-0029"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) enum PINCTRL_PIN_STATE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) PIN_STATE_DEFAULT = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) PIN_TDM_OUT_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) PIN_TDM_OUT_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) PIN_WOV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) PIN_STATE_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static const char * const mt8183_pin_str[PIN_STATE_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) "default", "aud_tdm_out_on", "aud_tdm_out_off", "wov",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct mt8183_mt6358_ts3a227_max98357_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct pinctrl *pinctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct pinctrl_state *pin_states[PIN_STATE_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct snd_soc_jack headset_jack, hdmi_jack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int mt8183_mt6358_i2s_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) unsigned int rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned int mclk_fs_ratio = 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) unsigned int mclk_fs = rate * mclk_fs_ratio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return snd_soc_dai_set_sysclk(asoc_rtd_to_cpu(rtd, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 0, mclk_fs, SND_SOC_CLOCK_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static const struct snd_soc_ops mt8183_mt6358_i2s_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .hw_params = mt8183_mt6358_i2s_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) mt8183_mt6358_rt1015_i2s_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned int rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned int mclk_fs_ratio = 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) unsigned int mclk_fs = rate * mclk_fs_ratio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct snd_soc_card *card = rtd->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct snd_soc_dai *codec_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) for_each_rtd_codec_dais(rtd, i, codec_dai) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ret = snd_soc_dai_set_bclk_ratio(codec_dai, 64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) dev_err(card->dev, "failed to set bclk ratio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ret = snd_soc_dai_set_pll(codec_dai, 0, RT1015_PLL_S_BCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) rate * 64, rate * 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) dev_err(card->dev, "failed to set pll\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ret = snd_soc_dai_set_sysclk(codec_dai, RT1015_SCLK_S_PLL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) rate * 256, SND_SOC_CLOCK_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) dev_err(card->dev, "failed to set sysclk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return snd_soc_dai_set_sysclk(asoc_rtd_to_cpu(rtd, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 0, mclk_fs, SND_SOC_CLOCK_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static const struct snd_soc_ops mt8183_mt6358_rt1015_i2s_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .hw_params = mt8183_mt6358_rt1015_i2s_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static int mt8183_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) dev_dbg(rtd->dev, "%s(), fix format to 32bit\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* fix BE i2s format to 32bit, clean param mask first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 0, SNDRV_PCM_FORMAT_LAST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) params_set_format(params, SNDRV_PCM_FORMAT_S32_LE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static int mt8183_rt1015_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dev_dbg(rtd->dev, "%s(), fix format to 32bit\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* fix BE i2s format to 32bit, clean param mask first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 0, SNDRV_PCM_FORMAT_LAST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) mt8183_mt6358_ts3a227_max98357_bt_sco_startup(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static const unsigned int rates[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 8000, 16000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static const struct snd_pcm_hw_constraint_list constraints_rates = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .count = ARRAY_SIZE(rates),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .list = rates,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .mask = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static const unsigned int channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static const struct snd_pcm_hw_constraint_list constraints_channels = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .count = ARRAY_SIZE(channels),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .list = channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .mask = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) snd_pcm_hw_constraint_list(runtime, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) runtime->hw.channels_max = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) snd_pcm_hw_constraint_list(runtime, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) SNDRV_PCM_HW_PARAM_CHANNELS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) &constraints_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) snd_pcm_hw_constraint_msbits(runtime, 0, 16, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static const struct snd_soc_ops mt8183_mt6358_ts3a227_max98357_bt_sco_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .startup = mt8183_mt6358_ts3a227_max98357_bt_sco_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /* FE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) SND_SOC_DAILINK_DEFS(playback1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) DAILINK_COMP_ARRAY(COMP_CPU("DL1")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) SND_SOC_DAILINK_DEFS(playback2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) DAILINK_COMP_ARRAY(COMP_CPU("DL2")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) SND_SOC_DAILINK_DEFS(playback3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) DAILINK_COMP_ARRAY(COMP_CPU("DL3")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) SND_SOC_DAILINK_DEFS(capture1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) DAILINK_COMP_ARRAY(COMP_CPU("UL1")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) SND_SOC_DAILINK_DEFS(capture2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) DAILINK_COMP_ARRAY(COMP_CPU("UL2")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) SND_SOC_DAILINK_DEFS(capture3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) DAILINK_COMP_ARRAY(COMP_CPU("UL3")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) SND_SOC_DAILINK_DEFS(capture_mono,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) DAILINK_COMP_ARRAY(COMP_CPU("UL_MONO_1")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) SND_SOC_DAILINK_DEFS(playback_hdmi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) DAILINK_COMP_ARRAY(COMP_CPU("HDMI")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) SND_SOC_DAILINK_DEFS(wake_on_voice,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /* BE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) SND_SOC_DAILINK_DEFS(primary_codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) DAILINK_COMP_ARRAY(COMP_CPU("ADDA")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) DAILINK_COMP_ARRAY(COMP_CODEC("mt6358-sound", "mt6358-snd-codec-aif1")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) SND_SOC_DAILINK_DEFS(pcm1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) DAILINK_COMP_ARRAY(COMP_CPU("PCM 1")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) SND_SOC_DAILINK_DEFS(pcm2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) DAILINK_COMP_ARRAY(COMP_CPU("PCM 2")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) SND_SOC_DAILINK_DEFS(i2s0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) DAILINK_COMP_ARRAY(COMP_CPU("I2S0")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) DAILINK_COMP_ARRAY(COMP_CODEC("bt-sco", "bt-sco-pcm")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) SND_SOC_DAILINK_DEFS(i2s1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) DAILINK_COMP_ARRAY(COMP_CPU("I2S1")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) SND_SOC_DAILINK_DEFS(i2s2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) DAILINK_COMP_ARRAY(COMP_CPU("I2S2")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) DAILINK_COMP_ARRAY(COMP_DUMMY()),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) SND_SOC_DAILINK_DEFS(i2s3_max98357a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) DAILINK_COMP_ARRAY(COMP_CPU("I2S3")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) DAILINK_COMP_ARRAY(COMP_CODEC("max98357a", "HiFi")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) SND_SOC_DAILINK_DEFS(i2s3_rt1015,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) DAILINK_COMP_ARRAY(COMP_CPU("I2S3")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) DAILINK_COMP_ARRAY(COMP_CODEC(RT1015_DEV0_NAME, RT1015_CODEC_DAI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) COMP_CODEC(RT1015_DEV1_NAME, RT1015_CODEC_DAI)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) SND_SOC_DAILINK_DEFS(i2s5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) DAILINK_COMP_ARRAY(COMP_CPU("I2S5")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) DAILINK_COMP_ARRAY(COMP_CODEC("bt-sco", "bt-sco-pcm")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) SND_SOC_DAILINK_DEFS(tdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) DAILINK_COMP_ARRAY(COMP_CPU("TDM")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "i2s-hifi")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) DAILINK_COMP_ARRAY(COMP_EMPTY()));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static int mt8183_mt6358_tdm_startup(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) struct mt8183_mt6358_ts3a227_max98357_priv *priv =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) snd_soc_card_get_drvdata(rtd->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (IS_ERR(priv->pin_states[PIN_TDM_OUT_ON]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return PTR_ERR(priv->pin_states[PIN_TDM_OUT_ON]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ret = pinctrl_select_state(priv->pinctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) priv->pin_states[PIN_TDM_OUT_ON]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) dev_err(rtd->card->dev, "%s failed to select state %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static void mt8183_mt6358_tdm_shutdown(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) struct mt8183_mt6358_ts3a227_max98357_priv *priv =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) snd_soc_card_get_drvdata(rtd->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) if (IS_ERR(priv->pin_states[PIN_TDM_OUT_OFF]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ret = pinctrl_select_state(priv->pinctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) priv->pin_states[PIN_TDM_OUT_OFF]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) dev_err(rtd->card->dev, "%s failed to select state %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static struct snd_soc_ops mt8183_mt6358_tdm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .startup = mt8183_mt6358_tdm_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .shutdown = mt8183_mt6358_tdm_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) mt8183_mt6358_ts3a227_max98357_wov_startup(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) struct snd_soc_card *card = rtd->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) struct mt8183_mt6358_ts3a227_max98357_priv *priv =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) snd_soc_card_get_drvdata(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return pinctrl_select_state(priv->pinctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) priv->pin_states[PIN_WOV]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) mt8183_mt6358_ts3a227_max98357_wov_shutdown(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct snd_soc_card *card = rtd->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct mt8183_mt6358_ts3a227_max98357_priv *priv =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) snd_soc_card_get_drvdata(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) ret = pinctrl_select_state(priv->pinctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) priv->pin_states[PIN_STATE_DEFAULT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) dev_err(card->dev, "%s failed to select state %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static const struct snd_soc_ops mt8183_mt6358_ts3a227_max98357_wov_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .startup = mt8183_mt6358_ts3a227_max98357_wov_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .shutdown = mt8183_mt6358_ts3a227_max98357_wov_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) mt8183_mt6358_ts3a227_max98357_hdmi_init(struct snd_soc_pcm_runtime *rtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) struct mt8183_mt6358_ts3a227_max98357_priv *priv =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) snd_soc_card_get_drvdata(rtd->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) &priv->hdmi_jack, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) return snd_soc_component_set_jack(asoc_rtd_to_codec(rtd, 0)->component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) &priv->hdmi_jack, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) /* FE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .name = "Playback_1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .stream_name = "Playback_1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) SND_SOC_DPCM_TRIGGER_PRE},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .dynamic = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .dpcm_playback = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) SND_SOC_DAILINK_REG(playback1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .name = "Playback_2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .stream_name = "Playback_2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) SND_SOC_DPCM_TRIGGER_PRE},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .dynamic = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .dpcm_playback = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .ops = &mt8183_mt6358_ts3a227_max98357_bt_sco_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) SND_SOC_DAILINK_REG(playback2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .name = "Playback_3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .stream_name = "Playback_3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) SND_SOC_DPCM_TRIGGER_PRE},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .dynamic = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .dpcm_playback = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) SND_SOC_DAILINK_REG(playback3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .name = "Capture_1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .stream_name = "Capture_1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) SND_SOC_DPCM_TRIGGER_PRE},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .dynamic = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .dpcm_capture = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .ops = &mt8183_mt6358_ts3a227_max98357_bt_sco_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) SND_SOC_DAILINK_REG(capture1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .name = "Capture_2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .stream_name = "Capture_2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) SND_SOC_DPCM_TRIGGER_PRE},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .dynamic = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .dpcm_capture = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) SND_SOC_DAILINK_REG(capture2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .name = "Capture_3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .stream_name = "Capture_3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) SND_SOC_DPCM_TRIGGER_PRE},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .dynamic = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .dpcm_capture = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) SND_SOC_DAILINK_REG(capture3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .name = "Capture_Mono_1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .stream_name = "Capture_Mono_1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) SND_SOC_DPCM_TRIGGER_PRE},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .dynamic = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .dpcm_capture = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) SND_SOC_DAILINK_REG(capture_mono),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .name = "Playback_HDMI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .stream_name = "Playback_HDMI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) SND_SOC_DPCM_TRIGGER_PRE},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .dynamic = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .dpcm_playback = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) SND_SOC_DAILINK_REG(playback_hdmi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .name = "Wake on Voice",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .stream_name = "Wake on Voice",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .ignore = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) SND_SOC_DAILINK_REG(wake_on_voice),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .ops = &mt8183_mt6358_ts3a227_max98357_wov_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) /* BE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .name = "Primary Codec",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .no_pcm = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .dpcm_playback = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .dpcm_capture = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) SND_SOC_DAILINK_REG(primary_codec),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .name = "PCM 1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .no_pcm = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .dpcm_playback = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) .dpcm_capture = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) SND_SOC_DAILINK_REG(pcm1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .name = "PCM 2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) .no_pcm = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .dpcm_playback = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .dpcm_capture = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) SND_SOC_DAILINK_REG(pcm2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) .name = "I2S0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .no_pcm = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .dpcm_capture = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .ops = &mt8183_mt6358_i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) SND_SOC_DAILINK_REG(i2s0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .name = "I2S1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .no_pcm = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .dpcm_playback = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) .be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) .ops = &mt8183_mt6358_i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) SND_SOC_DAILINK_REG(i2s1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .name = "I2S2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) .no_pcm = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) .dpcm_capture = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) .be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) .ops = &mt8183_mt6358_i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) SND_SOC_DAILINK_REG(i2s2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) .name = "I2S3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .no_pcm = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) .dpcm_playback = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .name = "I2S5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .no_pcm = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) .dpcm_playback = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) .ops = &mt8183_mt6358_i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) SND_SOC_DAILINK_REG(i2s5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) .name = "TDM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) .no_pcm = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) .dai_fmt = SND_SOC_DAIFMT_I2S |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) SND_SOC_DAIFMT_IB_IF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) SND_SOC_DAIFMT_CBM_CFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) .dpcm_playback = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) .ignore_suspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .ops = &mt8183_mt6358_tdm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .ignore = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .init = mt8183_mt6358_ts3a227_max98357_hdmi_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) SND_SOC_DAILINK_REG(tdm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static struct snd_soc_card mt8183_mt6358_ts3a227_max98357_card = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .name = "mt8183_mt6358_ts3a227_max98357",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .dai_link = mt8183_mt6358_ts3a227_dai_links,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .num_links = ARRAY_SIZE(mt8183_mt6358_ts3a227_dai_links),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) static struct snd_soc_card mt8183_mt6358_ts3a227_max98357b_card = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .name = "mt8183_mt6358_ts3a227_max98357b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) .dai_link = mt8183_mt6358_ts3a227_dai_links,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) .num_links = ARRAY_SIZE(mt8183_mt6358_ts3a227_dai_links),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) static struct snd_soc_codec_conf mt8183_mt6358_ts3a227_rt1015_amp_conf[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) .dlc = COMP_CODEC_CONF(RT1015_DEV0_NAME),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .name_prefix = "Left",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .dlc = COMP_CODEC_CONF(RT1015_DEV1_NAME),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .name_prefix = "Right",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static struct snd_soc_card mt8183_mt6358_ts3a227_rt1015_card = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) .name = "mt8183_mt6358_ts3a227_rt1015",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) .dai_link = mt8183_mt6358_ts3a227_dai_links,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) .num_links = ARRAY_SIZE(mt8183_mt6358_ts3a227_dai_links),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .codec_conf = mt8183_mt6358_ts3a227_rt1015_amp_conf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .num_configs = ARRAY_SIZE(mt8183_mt6358_ts3a227_rt1015_amp_conf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) mt8183_mt6358_ts3a227_max98357_headset_init(struct snd_soc_component *component)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) struct mt8183_mt6358_ts3a227_max98357_priv *priv =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) snd_soc_card_get_drvdata(component->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) /* Enable Headset and 4 Buttons Jack detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) ret = snd_soc_card_jack_new(component->card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) "Headset Jack",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) SND_JACK_HEADSET |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) SND_JACK_BTN_0 | SND_JACK_BTN_1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) SND_JACK_BTN_2 | SND_JACK_BTN_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) &priv->headset_jack,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) ret = ts3a227e_enable_jack_detect(component, &priv->headset_jack);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static struct snd_soc_aux_dev mt8183_mt6358_ts3a227_max98357_headset_dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .dlc = COMP_EMPTY(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) .init = mt8183_mt6358_ts3a227_max98357_headset_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) mt8183_mt6358_ts3a227_max98357_dev_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) struct snd_soc_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) struct device_node *platform_node, *ec_codec, *hdmi_codec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) struct snd_soc_dai_link *dai_link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) struct mt8183_mt6358_ts3a227_max98357_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) platform_node = of_parse_phandle(pdev->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) "mediatek,platform", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) if (!platform_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) dev_err(&pdev->dev, "Property 'platform' missing or invalid\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) match = of_match_device(pdev->dev.driver->of_match_table, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (!match || !match->data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) card = (struct snd_soc_card *)match->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) card->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) ec_codec = of_parse_phandle(pdev->dev.of_node, "mediatek,ec-codec", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) hdmi_codec = of_parse_phandle(pdev->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) "mediatek,hdmi-codec", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) for_each_card_prelinks(card, i, dai_link) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) if (ec_codec && strcmp(dai_link->name, "Wake on Voice") == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) dai_link->cpus[0].name = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) dai_link->cpus[0].of_node = ec_codec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) dai_link->cpus[0].dai_name = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) dai_link->codecs[0].name = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) dai_link->codecs[0].of_node = ec_codec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) dai_link->codecs[0].dai_name = "Wake on Voice";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) dai_link->platforms[0].of_node = ec_codec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) dai_link->ignore = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) if (strcmp(dai_link->name, "I2S3") == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (card == &mt8183_mt6358_ts3a227_max98357_card ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) card == &mt8183_mt6358_ts3a227_max98357b_card) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) dai_link->be_hw_params_fixup =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) mt8183_i2s_hw_params_fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) dai_link->ops = &mt8183_mt6358_i2s_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) dai_link->cpus = i2s3_max98357a_cpus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) dai_link->num_cpus =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) ARRAY_SIZE(i2s3_max98357a_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) dai_link->codecs = i2s3_max98357a_codecs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) dai_link->num_codecs =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) ARRAY_SIZE(i2s3_max98357a_codecs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) dai_link->platforms = i2s3_max98357a_platforms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) dai_link->num_platforms =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) ARRAY_SIZE(i2s3_max98357a_platforms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) } else if (card == &mt8183_mt6358_ts3a227_rt1015_card) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) dai_link->be_hw_params_fixup =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) mt8183_rt1015_i2s_hw_params_fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) dai_link->ops = &mt8183_mt6358_rt1015_i2s_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) dai_link->cpus = i2s3_rt1015_cpus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) dai_link->num_cpus =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) ARRAY_SIZE(i2s3_rt1015_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) dai_link->codecs = i2s3_rt1015_codecs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) dai_link->num_codecs =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) ARRAY_SIZE(i2s3_rt1015_codecs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) dai_link->platforms = i2s3_rt1015_platforms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) dai_link->num_platforms =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) ARRAY_SIZE(i2s3_rt1015_platforms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) if (card == &mt8183_mt6358_ts3a227_max98357b_card) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) if (strcmp(dai_link->name, "I2S2") == 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) strcmp(dai_link->name, "I2S3") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) dai_link->dai_fmt = SND_SOC_DAIFMT_LEFT_J |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) SND_SOC_DAIFMT_NB_NF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) SND_SOC_DAIFMT_CBM_CFM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) if (hdmi_codec && strcmp(dai_link->name, "TDM") == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) dai_link->codecs->of_node = hdmi_codec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) dai_link->ignore = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) if (!dai_link->platforms->name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) dai_link->platforms->of_node = platform_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) mt8183_mt6358_ts3a227_max98357_headset_dev.dlc.of_node =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) of_parse_phandle(pdev->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) "mediatek,headset-codec", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) if (mt8183_mt6358_ts3a227_max98357_headset_dev.dlc.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) card->aux_dev = &mt8183_mt6358_ts3a227_max98357_headset_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) card->num_aux_devs = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) snd_soc_card_set_drvdata(card, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) priv->pinctrl = devm_pinctrl_get(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) if (IS_ERR(priv->pinctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) dev_err(&pdev->dev, "%s devm_pinctrl_get failed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) return PTR_ERR(priv->pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) for (i = 0; i < PIN_STATE_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) priv->pin_states[i] = pinctrl_lookup_state(priv->pinctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) mt8183_pin_str[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) if (IS_ERR(priv->pin_states[i])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) ret = PTR_ERR(priv->pin_states[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) dev_info(&pdev->dev, "%s Can't find pin state %s %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) __func__, mt8183_pin_str[i], ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (!IS_ERR(priv->pin_states[PIN_TDM_OUT_OFF])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) ret = pinctrl_select_state(priv->pinctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) priv->pin_states[PIN_TDM_OUT_OFF]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) dev_info(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) "%s failed to select state %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (!IS_ERR(priv->pin_states[PIN_STATE_DEFAULT])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) ret = pinctrl_select_state(priv->pinctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) priv->pin_states[PIN_STATE_DEFAULT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) dev_info(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) "%s failed to select state %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) ret = devm_snd_soc_register_card(&pdev->dev, card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) of_node_put(platform_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) of_node_put(ec_codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) of_node_put(hdmi_codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) static const struct of_device_id mt8183_mt6358_ts3a227_max98357_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) .compatible = "mediatek,mt8183_mt6358_ts3a227_max98357",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) .data = &mt8183_mt6358_ts3a227_max98357_card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .compatible = "mediatek,mt8183_mt6358_ts3a227_max98357b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .data = &mt8183_mt6358_ts3a227_max98357b_card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) .compatible = "mediatek,mt8183_mt6358_ts3a227_rt1015",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) .data = &mt8183_mt6358_ts3a227_rt1015_card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) static struct platform_driver mt8183_mt6358_ts3a227_max98357_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) .name = "mt8183_mt6358_ts3a227",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) .of_match_table = mt8183_mt6358_ts3a227_max98357_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .probe = mt8183_mt6358_ts3a227_max98357_dev_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) module_platform_driver(mt8183_mt6358_ts3a227_max98357_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) /* Module information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) MODULE_DESCRIPTION("MT8183-MT6358-TS3A227-MAX98357 ALSA SoC machine driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) MODULE_AUTHOR("Shunli Wang <shunli.wang@mediatek.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) MODULE_ALIAS("mt8183_mt6358_ts3a227_max98357 soc card");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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