Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Mediatek MT8183 audio driver interconnection definition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (c) 2018 MediaTek Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #ifndef _MT8183_INTERCONNECTION_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define _MT8183_INTERCONNECTION_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define I_I2S0_CH1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define I_I2S0_CH2 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define I_ADDA_UL_CH1 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define I_ADDA_UL_CH2 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define I_DL1_CH1 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define I_DL1_CH2 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define I_DL2_CH1 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define I_DL2_CH2 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define I_PCM_1_CAP_CH1 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define I_GAIN1_OUT_CH1 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define I_GAIN1_OUT_CH2 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define I_GAIN2_OUT_CH1 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define I_GAIN2_OUT_CH2 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define I_PCM_2_CAP_CH1 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define I_PCM_2_CAP_CH2 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define I_PCM_1_CAP_CH2 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define I_DL3_CH1 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define I_DL3_CH2 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define I_I2S2_CH1 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define I_I2S2_CH2 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #endif