^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // MediaTek ALSA SoC Audio DAI I2S Control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (c) 2018 MediaTek Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "mt8183-afe-common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "mt8183-interconnection.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "mt8183-reg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) enum AUD_TX_LCH_RPT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) AUD_TX_LCH_RPT_NO_REPEAT = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) AUD_TX_LCH_RPT_REPEAT = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) enum AUD_VBT_16K_MODE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) AUD_VBT_16K_MODE_DISABLE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) AUD_VBT_16K_MODE_ENABLE = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) enum AUD_EXT_MODEM {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) AUD_EXT_MODEM_SELECT_INTERNAL = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) AUD_EXT_MODEM_SELECT_EXTERNAL = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) enum AUD_PCM_SYNC_TYPE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* bck sync length = 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) AUD_PCM_ONE_BCK_CYCLE_SYNC = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* bck sync length = PCM_INTF_CON1[9:13] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) AUD_PCM_EXTENDED_BCK_CYCLE_SYNC = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) enum AUD_BT_MODE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) AUD_BT_MODE_DUAL_MIC_ON_TX = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) AUD_BT_MODE_SINGLE_MIC_ON_TX = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) enum AUD_PCM_AFIFO_SRC {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* slave mode & external modem uses different crystal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) AUD_PCM_AFIFO_ASRC = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* slave mode & external modem uses the same crystal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) AUD_PCM_AFIFO_AFIFO = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) enum AUD_PCM_CLOCK_SOURCE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) AUD_PCM_CLOCK_MASTER_MODE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) AUD_PCM_CLOCK_SLAVE_MODE = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) enum AUD_PCM_WLEN {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) AUD_PCM_WLEN_PCM_32_BCK_CYCLES = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) AUD_PCM_WLEN_PCM_64_BCK_CYCLES = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) enum AUD_PCM_MODE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) AUD_PCM_MODE_PCM_MODE_8K = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) AUD_PCM_MODE_PCM_MODE_16K = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) AUD_PCM_MODE_PCM_MODE_32K = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) AUD_PCM_MODE_PCM_MODE_48K = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) enum AUD_PCM_FMT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) AUD_PCM_FMT_I2S = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) AUD_PCM_FMT_EIAJ = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) AUD_PCM_FMT_PCM_MODE_A = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) AUD_PCM_FMT_PCM_MODE_B = 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) enum AUD_BCLK_OUT_INV {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) AUD_BCLK_OUT_INV_NO_INVERSE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) AUD_BCLK_OUT_INV_INVERSE = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) enum AUD_PCM_EN {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) AUD_PCM_EN_DISABLE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) AUD_PCM_EN_ENABLE = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* dai component */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static const struct snd_kcontrol_new mtk_pcm_1_playback_ch1_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) I_ADDA_UL_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) I_DL2_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static const struct snd_kcontrol_new mtk_pcm_1_playback_ch2_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) I_ADDA_UL_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) I_DL2_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static const struct snd_kcontrol_new mtk_pcm_1_playback_ch4_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) I_DL1_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const struct snd_kcontrol_new mtk_pcm_2_playback_ch1_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) I_ADDA_UL_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) I_DL2_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static const struct snd_kcontrol_new mtk_pcm_2_playback_ch2_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) I_ADDA_UL_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) I_DL2_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static const struct snd_kcontrol_new mtk_pcm_2_playback_ch4_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) I_DL1_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static const struct snd_soc_dapm_widget mtk_dai_pcm_widgets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* inter-connections */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) SND_SOC_DAPM_MIXER("PCM_1_PB_CH1", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) mtk_pcm_1_playback_ch1_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ARRAY_SIZE(mtk_pcm_1_playback_ch1_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) SND_SOC_DAPM_MIXER("PCM_1_PB_CH2", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) mtk_pcm_1_playback_ch2_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) ARRAY_SIZE(mtk_pcm_1_playback_ch2_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) SND_SOC_DAPM_MIXER("PCM_1_PB_CH4", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) mtk_pcm_1_playback_ch4_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) ARRAY_SIZE(mtk_pcm_1_playback_ch4_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) SND_SOC_DAPM_MIXER("PCM_2_PB_CH1", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) mtk_pcm_2_playback_ch1_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) ARRAY_SIZE(mtk_pcm_2_playback_ch1_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) SND_SOC_DAPM_MIXER("PCM_2_PB_CH2", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) mtk_pcm_2_playback_ch2_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) ARRAY_SIZE(mtk_pcm_2_playback_ch2_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) SND_SOC_DAPM_MIXER("PCM_2_PB_CH4", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) mtk_pcm_2_playback_ch4_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) ARRAY_SIZE(mtk_pcm_2_playback_ch4_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) SND_SOC_DAPM_SUPPLY("PCM_1_EN", PCM_INTF_CON1, PCM_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) SND_SOC_DAPM_SUPPLY("PCM_2_EN", PCM2_INTF_CON, PCM2_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) SND_SOC_DAPM_INPUT("MD1_TO_AFE"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) SND_SOC_DAPM_INPUT("MD2_TO_AFE"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) SND_SOC_DAPM_OUTPUT("AFE_TO_MD1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) SND_SOC_DAPM_OUTPUT("AFE_TO_MD2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static const struct snd_soc_dapm_route mtk_dai_pcm_routes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {"PCM 1 Playback", NULL, "PCM_1_PB_CH1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {"PCM 1 Playback", NULL, "PCM_1_PB_CH2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {"PCM 1 Playback", NULL, "PCM_1_PB_CH4"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {"PCM 2 Playback", NULL, "PCM_2_PB_CH1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {"PCM 2 Playback", NULL, "PCM_2_PB_CH2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {"PCM 2 Playback", NULL, "PCM_2_PB_CH4"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {"PCM 1 Playback", NULL, "PCM_1_EN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {"PCM 2 Playback", NULL, "PCM_2_EN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {"PCM 1 Capture", NULL, "PCM_1_EN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {"PCM 2 Capture", NULL, "PCM_2_EN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {"AFE_TO_MD1", NULL, "PCM 2 Playback"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {"AFE_TO_MD2", NULL, "PCM 1 Playback"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {"PCM 2 Capture", NULL, "MD1_TO_AFE"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {"PCM 1 Capture", NULL, "MD2_TO_AFE"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {"PCM_1_PB_CH1", "DL2_CH1", "DL2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {"PCM_1_PB_CH2", "DL2_CH2", "DL2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {"PCM_1_PB_CH4", "DL1_CH1", "DL1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {"PCM_2_PB_CH1", "DL2_CH1", "DL2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {"PCM_2_PB_CH2", "DL2_CH2", "DL2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {"PCM_2_PB_CH4", "DL1_CH1", "DL1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* dai ops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static int mtk_dai_pcm_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) unsigned int rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) unsigned int rate_reg = mt8183_rate_transform(afe->dev, rate, dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) unsigned int pcm_con = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) dev_dbg(afe->dev, "%s(), id %d, stream %d, rate %d, rate_reg %d, widget active p %d, c %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) dai->id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) substream->stream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) rate_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) dai->playback_widget->active,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) dai->capture_widget->active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (dai->playback_widget->active || dai->capture_widget->active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) switch (dai->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) case MT8183_DAI_PCM_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) pcm_con |= AUD_BCLK_OUT_INV_NO_INVERSE << PCM_BCLK_OUT_INV_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) pcm_con |= AUD_TX_LCH_RPT_NO_REPEAT << PCM_TX_LCH_RPT_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) pcm_con |= AUD_VBT_16K_MODE_DISABLE << PCM_VBT_16K_MODE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) pcm_con |= AUD_EXT_MODEM_SELECT_INTERNAL << PCM_EXT_MODEM_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) pcm_con |= 0 << PCM_SYNC_LENGTH_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) pcm_con |= AUD_PCM_ONE_BCK_CYCLE_SYNC << PCM_SYNC_TYPE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) pcm_con |= AUD_BT_MODE_DUAL_MIC_ON_TX << PCM_BT_MODE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) pcm_con |= AUD_PCM_AFIFO_AFIFO << PCM_BYP_ASRC_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) pcm_con |= AUD_PCM_CLOCK_SLAVE_MODE << PCM_SLAVE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) pcm_con |= rate_reg << PCM_MODE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) pcm_con |= AUD_PCM_FMT_PCM_MODE_B << PCM_FMT_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) regmap_update_bits(afe->regmap, PCM_INTF_CON1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 0xfffffffe, pcm_con);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) case MT8183_DAI_PCM_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) pcm_con |= AUD_TX_LCH_RPT_NO_REPEAT << PCM2_TX_LCH_RPT_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) pcm_con |= AUD_VBT_16K_MODE_DISABLE << PCM2_VBT_16K_MODE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) pcm_con |= AUD_BT_MODE_DUAL_MIC_ON_TX << PCM2_BT_MODE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) pcm_con |= AUD_PCM_AFIFO_AFIFO << PCM2_AFIFO_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) pcm_con |= AUD_PCM_WLEN_PCM_32_BCK_CYCLES << PCM2_WLEN_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) pcm_con |= rate_reg << PCM2_MODE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) pcm_con |= AUD_PCM_FMT_PCM_MODE_B << PCM2_FMT_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) regmap_update_bits(afe->regmap, PCM2_INTF_CON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 0xfffffffe, pcm_con);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) dev_warn(afe->dev, "%s(), id %d not support\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) __func__, dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static const struct snd_soc_dai_ops mtk_dai_pcm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .hw_params = mtk_dai_pcm_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* dai driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define MTK_PCM_RATES (SNDRV_PCM_RATE_8000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) SNDRV_PCM_RATE_16000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) SNDRV_PCM_RATE_32000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) SNDRV_PCM_RATE_48000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define MTK_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) SNDRV_PCM_FMTBIT_S24_LE |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) SNDRV_PCM_FMTBIT_S32_LE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static struct snd_soc_dai_driver mtk_dai_pcm_driver[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .name = "PCM 1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .id = MT8183_DAI_PCM_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .stream_name = "PCM 1 Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .rates = MTK_PCM_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .formats = MTK_PCM_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .stream_name = "PCM 1 Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .rates = MTK_PCM_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .formats = MTK_PCM_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .ops = &mtk_dai_pcm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .symmetric_rates = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .symmetric_samplebits = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .name = "PCM 2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .id = MT8183_DAI_PCM_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .stream_name = "PCM 2 Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .rates = MTK_PCM_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .formats = MTK_PCM_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .stream_name = "PCM 2 Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .rates = MTK_PCM_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .formats = MTK_PCM_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .ops = &mtk_dai_pcm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .symmetric_rates = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .symmetric_samplebits = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) int mt8183_dai_pcm_register(struct mtk_base_afe *afe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) struct mtk_base_afe_dai *dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (!dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) list_add(&dai->list, &afe->sub_dais);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) dai->dai_drivers = mtk_dai_pcm_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_pcm_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) dai->dapm_widgets = mtk_dai_pcm_widgets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_pcm_widgets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) dai->dapm_routes = mtk_dai_pcm_routes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_pcm_routes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }