^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // MediaTek ALSA SoC Audio DAI I2S Control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (c) 2018 MediaTek Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "mt8183-afe-clk.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "mt8183-afe-common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "mt8183-interconnection.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "mt8183-reg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) I2S_FMT_EIAJ = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) I2S_FMT_I2S = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) I2S_WLEN_16_BIT = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) I2S_WLEN_32_BIT = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) I2S_HD_NORMAL = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) I2S_HD_LOW_JITTER = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) I2S1_SEL_O28_O29 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) I2S1_SEL_O03_O04 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) I2S_IN_PAD_CONNSYS = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) I2S_IN_PAD_IO_MUX = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct mtk_afe_i2s_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int rate; /* for determine which apll to use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int low_jitter_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) const char *share_property_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int share_i2s_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int mclk_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int mclk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int mclk_apll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int use_eiaj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static unsigned int get_i2s_wlen(snd_pcm_format_t format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return snd_pcm_format_physical_width(format) <= 16 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) I2S_WLEN_16_BIT : I2S_WLEN_32_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define MTK_AFE_I2S0_KCONTROL_NAME "I2S0_HD_Mux"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define MTK_AFE_I2S1_KCONTROL_NAME "I2S1_HD_Mux"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define MTK_AFE_I2S2_KCONTROL_NAME "I2S2_HD_Mux"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define MTK_AFE_I2S3_KCONTROL_NAME "I2S3_HD_Mux"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define MTK_AFE_I2S5_KCONTROL_NAME "I2S5_HD_Mux"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define I2S0_HD_EN_W_NAME "I2S0_HD_EN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define I2S1_HD_EN_W_NAME "I2S1_HD_EN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define I2S2_HD_EN_W_NAME "I2S2_HD_EN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define I2S3_HD_EN_W_NAME "I2S3_HD_EN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define I2S5_HD_EN_W_NAME "I2S5_HD_EN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define I2S0_MCLK_EN_W_NAME "I2S0_MCLK_EN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define I2S1_MCLK_EN_W_NAME "I2S1_MCLK_EN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define I2S2_MCLK_EN_W_NAME "I2S2_MCLK_EN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define I2S3_MCLK_EN_W_NAME "I2S3_MCLK_EN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define I2S5_MCLK_EN_W_NAME "I2S5_MCLK_EN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static int get_i2s_id_by_name(struct mtk_base_afe *afe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (strncmp(name, "I2S0", 4) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return MT8183_DAI_I2S_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) else if (strncmp(name, "I2S1", 4) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return MT8183_DAI_I2S_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) else if (strncmp(name, "I2S2", 4) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return MT8183_DAI_I2S_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) else if (strncmp(name, "I2S3", 4) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return MT8183_DAI_I2S_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) else if (strncmp(name, "I2S5", 4) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return MT8183_DAI_I2S_5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static struct mtk_afe_i2s_priv *get_i2s_priv_by_name(struct mtk_base_afe *afe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct mt8183_afe_private *afe_priv = afe->platform_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int dai_id = get_i2s_id_by_name(afe, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (dai_id < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return afe_priv->dai_priv[dai_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* low jitter control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static const char * const mt8183_i2s_hd_str[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) "Normal", "Low_Jitter"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static const struct soc_enum mt8183_i2s_enum[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mt8183_i2s_hd_str),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) mt8183_i2s_hd_str),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static int mt8183_i2s_hd_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct mtk_afe_i2s_priv *i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) i2s_priv = get_i2s_priv_by_name(afe, kcontrol->id.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (!i2s_priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) dev_warn(afe->dev, "%s(), i2s_priv == NULL", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) ucontrol->value.integer.value[0] = i2s_priv->low_jitter_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int mt8183_i2s_hd_set(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct mtk_afe_i2s_priv *i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int hd_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (ucontrol->value.enumerated.item[0] >= e->items)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) hd_en = ucontrol->value.integer.value[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) dev_info(afe->dev, "%s(), kcontrol name %s, hd_en %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) __func__, kcontrol->id.name, hd_en);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) i2s_priv = get_i2s_priv_by_name(afe, kcontrol->id.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (!i2s_priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) dev_warn(afe->dev, "%s(), i2s_priv == NULL", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) i2s_priv->low_jitter_en = hd_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static const struct snd_kcontrol_new mtk_dai_i2s_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) SOC_ENUM_EXT(MTK_AFE_I2S0_KCONTROL_NAME, mt8183_i2s_enum[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) mt8183_i2s_hd_get, mt8183_i2s_hd_set),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) SOC_ENUM_EXT(MTK_AFE_I2S1_KCONTROL_NAME, mt8183_i2s_enum[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) mt8183_i2s_hd_get, mt8183_i2s_hd_set),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) SOC_ENUM_EXT(MTK_AFE_I2S2_KCONTROL_NAME, mt8183_i2s_enum[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) mt8183_i2s_hd_get, mt8183_i2s_hd_set),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) SOC_ENUM_EXT(MTK_AFE_I2S3_KCONTROL_NAME, mt8183_i2s_enum[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) mt8183_i2s_hd_get, mt8183_i2s_hd_set),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) SOC_ENUM_EXT(MTK_AFE_I2S5_KCONTROL_NAME, mt8183_i2s_enum[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) mt8183_i2s_hd_get, mt8183_i2s_hd_set),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* dai component */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* interconnection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static const struct snd_kcontrol_new mtk_i2s3_ch1_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN0, I_DL1_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN0, I_DL2_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1", AFE_CONN0, I_DL3_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) I_ADDA_UL_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) I_PCM_1_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) I_PCM_2_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static const struct snd_kcontrol_new mtk_i2s3_ch2_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2", AFE_CONN1, I_DL1_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN1, I_DL2_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2", AFE_CONN1, I_DL3_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) I_ADDA_UL_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) I_PCM_1_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) I_PCM_2_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2", AFE_CONN1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) I_PCM_1_CAP_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2", AFE_CONN1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) I_PCM_2_CAP_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static const struct snd_kcontrol_new mtk_i2s1_ch1_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN28, I_DL1_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN28, I_DL2_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1", AFE_CONN28, I_DL3_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) I_ADDA_UL_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) I_PCM_1_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) I_PCM_2_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static const struct snd_kcontrol_new mtk_i2s1_ch2_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2", AFE_CONN29, I_DL1_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN29, I_DL2_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2", AFE_CONN29, I_DL3_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) I_ADDA_UL_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) I_PCM_1_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) I_PCM_2_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2", AFE_CONN29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) I_PCM_1_CAP_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2", AFE_CONN29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) I_PCM_2_CAP_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static const struct snd_kcontrol_new mtk_i2s5_ch1_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN30, I_DL1_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN30, I_DL2_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1", AFE_CONN30, I_DL3_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) I_ADDA_UL_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) I_PCM_1_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) I_PCM_2_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static const struct snd_kcontrol_new mtk_i2s5_ch2_mix[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2", AFE_CONN31, I_DL1_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN31, I_DL2_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2", AFE_CONN31, I_DL3_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) I_ADDA_UL_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) I_PCM_1_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) I_PCM_2_CAP_CH1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2", AFE_CONN31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) I_PCM_1_CAP_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2", AFE_CONN31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) I_PCM_2_CAP_CH2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) SUPPLY_SEQ_APLL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) SUPPLY_SEQ_I2S_MCLK_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) SUPPLY_SEQ_I2S_HD_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) SUPPLY_SEQ_I2S_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static int mtk_apll_event(struct snd_soc_dapm_widget *w,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) int event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) dev_info(cmpnt->dev, "%s(), name %s, event 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) __func__, w->name, event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) switch (event) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) case SND_SOC_DAPM_PRE_PMU:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (strcmp(w->name, APLL1_W_NAME) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) mt8183_apll1_enable(afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) mt8183_apll2_enable(afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) case SND_SOC_DAPM_POST_PMD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (strcmp(w->name, APLL1_W_NAME) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) mt8183_apll1_disable(afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) mt8183_apll2_disable(afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static int mtk_mclk_en_event(struct snd_soc_dapm_widget *w,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) int event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) struct mtk_afe_i2s_priv *i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) dev_info(cmpnt->dev, "%s(), name %s, event 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) __func__, w->name, event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) i2s_priv = get_i2s_priv_by_name(afe, w->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (!i2s_priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) dev_warn(afe->dev, "%s(), i2s_priv == NULL", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) switch (event) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) case SND_SOC_DAPM_PRE_PMU:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) mt8183_mck_enable(afe, i2s_priv->mclk_id, i2s_priv->mclk_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) case SND_SOC_DAPM_POST_PMD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) i2s_priv->mclk_rate = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) mt8183_mck_disable(afe, i2s_priv->mclk_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static const struct snd_soc_dapm_widget mtk_dai_i2s_widgets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) SND_SOC_DAPM_MIXER("I2S1_CH1", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) mtk_i2s1_ch1_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) ARRAY_SIZE(mtk_i2s1_ch1_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) SND_SOC_DAPM_MIXER("I2S1_CH2", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) mtk_i2s1_ch2_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) ARRAY_SIZE(mtk_i2s1_ch2_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) SND_SOC_DAPM_MIXER("I2S3_CH1", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) mtk_i2s3_ch1_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) ARRAY_SIZE(mtk_i2s3_ch1_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) SND_SOC_DAPM_MIXER("I2S3_CH2", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) mtk_i2s3_ch2_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) ARRAY_SIZE(mtk_i2s3_ch2_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) SND_SOC_DAPM_MIXER("I2S5_CH1", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) mtk_i2s5_ch1_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) ARRAY_SIZE(mtk_i2s5_ch1_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) SND_SOC_DAPM_MIXER("I2S5_CH2", SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) mtk_i2s5_ch2_mix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) ARRAY_SIZE(mtk_i2s5_ch2_mix)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) /* i2s en*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) SND_SOC_DAPM_SUPPLY_S("I2S0_EN", SUPPLY_SEQ_I2S_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) AFE_I2S_CON, I2S_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) SND_SOC_DAPM_SUPPLY_S("I2S1_EN", SUPPLY_SEQ_I2S_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) AFE_I2S_CON1, I2S_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) SND_SOC_DAPM_SUPPLY_S("I2S2_EN", SUPPLY_SEQ_I2S_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) AFE_I2S_CON2, I2S_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) SND_SOC_DAPM_SUPPLY_S("I2S3_EN", SUPPLY_SEQ_I2S_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) AFE_I2S_CON3, I2S_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) SND_SOC_DAPM_SUPPLY_S("I2S5_EN", SUPPLY_SEQ_I2S_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) AFE_I2S_CON4, I2S5_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /* i2s hd en */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) SND_SOC_DAPM_SUPPLY_S(I2S0_HD_EN_W_NAME, SUPPLY_SEQ_I2S_HD_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) AFE_I2S_CON, I2S1_HD_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) SND_SOC_DAPM_SUPPLY_S(I2S1_HD_EN_W_NAME, SUPPLY_SEQ_I2S_HD_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) AFE_I2S_CON1, I2S2_HD_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) SND_SOC_DAPM_SUPPLY_S(I2S2_HD_EN_W_NAME, SUPPLY_SEQ_I2S_HD_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) AFE_I2S_CON2, I2S3_HD_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) SND_SOC_DAPM_SUPPLY_S(I2S3_HD_EN_W_NAME, SUPPLY_SEQ_I2S_HD_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) AFE_I2S_CON3, I2S4_HD_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) SND_SOC_DAPM_SUPPLY_S(I2S5_HD_EN_W_NAME, SUPPLY_SEQ_I2S_HD_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) AFE_I2S_CON4, I2S5_HD_EN_SFT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) /* i2s mclk en */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) SND_SOC_DAPM_SUPPLY_S(I2S0_MCLK_EN_W_NAME, SUPPLY_SEQ_I2S_MCLK_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) mtk_mclk_en_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) SND_SOC_DAPM_SUPPLY_S(I2S1_MCLK_EN_W_NAME, SUPPLY_SEQ_I2S_MCLK_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) mtk_mclk_en_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) SND_SOC_DAPM_SUPPLY_S(I2S2_MCLK_EN_W_NAME, SUPPLY_SEQ_I2S_MCLK_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) mtk_mclk_en_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) SND_SOC_DAPM_SUPPLY_S(I2S3_MCLK_EN_W_NAME, SUPPLY_SEQ_I2S_MCLK_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) mtk_mclk_en_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) SND_SOC_DAPM_SUPPLY_S(I2S5_MCLK_EN_W_NAME, SUPPLY_SEQ_I2S_MCLK_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) mtk_mclk_en_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /* apll */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) SND_SOC_DAPM_SUPPLY_S(APLL1_W_NAME, SUPPLY_SEQ_APLL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) mtk_apll_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) SND_SOC_DAPM_SUPPLY_S(APLL2_W_NAME, SUPPLY_SEQ_APLL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) SND_SOC_NOPM, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) mtk_apll_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static int mtk_afe_i2s_share_connect(struct snd_soc_dapm_widget *source,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct snd_soc_dapm_widget *sink)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) struct snd_soc_dapm_widget *w = sink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) struct mtk_afe_i2s_priv *i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) i2s_priv = get_i2s_priv_by_name(afe, sink->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (!i2s_priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) dev_warn(afe->dev, "%s(), i2s_priv == NULL", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (i2s_priv->share_i2s_id < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) return i2s_priv->share_i2s_id == get_i2s_id_by_name(afe, source->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) static int mtk_afe_i2s_hd_connect(struct snd_soc_dapm_widget *source,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) struct snd_soc_dapm_widget *sink)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) struct snd_soc_dapm_widget *w = sink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) struct mtk_afe_i2s_priv *i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) i2s_priv = get_i2s_priv_by_name(afe, sink->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (!i2s_priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) dev_warn(afe->dev, "%s(), i2s_priv == NULL", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (get_i2s_id_by_name(afe, sink->name) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) get_i2s_id_by_name(afe, source->name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return i2s_priv->low_jitter_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) /* check if share i2s need hd en */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (i2s_priv->share_i2s_id < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (i2s_priv->share_i2s_id == get_i2s_id_by_name(afe, source->name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return i2s_priv->low_jitter_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) static int mtk_afe_i2s_apll_connect(struct snd_soc_dapm_widget *source,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) struct snd_soc_dapm_widget *sink)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) struct snd_soc_dapm_widget *w = sink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) struct mtk_afe_i2s_priv *i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) int cur_apll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) int i2s_need_apll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) i2s_priv = get_i2s_priv_by_name(afe, w->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (!i2s_priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) dev_warn(afe->dev, "%s(), i2s_priv == NULL", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /* which apll */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) cur_apll = mt8183_get_apll_by_name(afe, source->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) /* choose APLL from i2s rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) i2s_need_apll = mt8183_get_apll_by_rate(afe, i2s_priv->rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return (i2s_need_apll == cur_apll) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) static int mtk_afe_i2s_mclk_connect(struct snd_soc_dapm_widget *source,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) struct snd_soc_dapm_widget *sink)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) struct snd_soc_dapm_widget *w = sink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct mtk_afe_i2s_priv *i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) i2s_priv = get_i2s_priv_by_name(afe, sink->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) if (!i2s_priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) dev_warn(afe->dev, "%s(), i2s_priv == NULL", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (get_i2s_id_by_name(afe, sink->name) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) get_i2s_id_by_name(afe, source->name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) return (i2s_priv->mclk_rate > 0) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) /* check if share i2s need mclk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (i2s_priv->share_i2s_id < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (i2s_priv->share_i2s_id == get_i2s_id_by_name(afe, source->name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) return (i2s_priv->mclk_rate > 0) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) static int mtk_afe_mclk_apll_connect(struct snd_soc_dapm_widget *source,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) struct snd_soc_dapm_widget *sink)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) struct snd_soc_dapm_widget *w = sink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) struct mtk_afe_i2s_priv *i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) int cur_apll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) i2s_priv = get_i2s_priv_by_name(afe, w->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (!i2s_priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) dev_warn(afe->dev, "%s(), i2s_priv == NULL", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) /* which apll */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) cur_apll = mt8183_get_apll_by_name(afe, source->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) return (i2s_priv->mclk_apll == cur_apll) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) static const struct snd_soc_dapm_route mtk_dai_i2s_routes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* i2s0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) {"I2S0", NULL, "I2S0_EN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) {"I2S0", NULL, "I2S1_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) {"I2S0", NULL, "I2S2_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) {"I2S0", NULL, "I2S3_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) {"I2S0", NULL, "I2S5_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {"I2S0", NULL, I2S0_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) {"I2S0", NULL, I2S1_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) {"I2S0", NULL, I2S2_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) {"I2S0", NULL, I2S3_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) {"I2S0", NULL, I2S5_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) {I2S0_HD_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_i2s_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) {I2S0_HD_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_i2s_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) {"I2S0", NULL, I2S0_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) {"I2S0", NULL, I2S1_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {"I2S0", NULL, I2S2_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) {"I2S0", NULL, I2S3_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) {"I2S0", NULL, I2S5_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) {I2S0_MCLK_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_mclk_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {I2S0_MCLK_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_mclk_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) /* i2s1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) {"I2S1_CH1", "DL1_CH1", "DL1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {"I2S1_CH2", "DL1_CH2", "DL1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) {"I2S1_CH1", "DL2_CH1", "DL2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {"I2S1_CH2", "DL2_CH2", "DL2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {"I2S1_CH1", "DL3_CH1", "DL3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) {"I2S1_CH2", "DL3_CH2", "DL3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) {"I2S1", NULL, "I2S1_CH1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) {"I2S1", NULL, "I2S1_CH2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {"I2S1", NULL, "I2S0_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) {"I2S1", NULL, "I2S1_EN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) {"I2S1", NULL, "I2S2_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) {"I2S1", NULL, "I2S3_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {"I2S1", NULL, "I2S5_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {"I2S1", NULL, I2S0_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) {"I2S1", NULL, I2S1_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) {"I2S1", NULL, I2S2_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) {"I2S1", NULL, I2S3_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) {"I2S1", NULL, I2S5_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {I2S1_HD_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_i2s_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) {I2S1_HD_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_i2s_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) {"I2S1", NULL, I2S0_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) {"I2S1", NULL, I2S1_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) {"I2S1", NULL, I2S2_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) {"I2S1", NULL, I2S3_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) {"I2S1", NULL, I2S5_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {I2S1_MCLK_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_mclk_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) {I2S1_MCLK_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_mclk_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* i2s2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) {"I2S2", NULL, "I2S0_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) {"I2S2", NULL, "I2S1_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) {"I2S2", NULL, "I2S2_EN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) {"I2S2", NULL, "I2S3_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) {"I2S2", NULL, "I2S5_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) {"I2S2", NULL, I2S0_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) {"I2S2", NULL, I2S1_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {"I2S2", NULL, I2S2_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {"I2S2", NULL, I2S3_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) {"I2S2", NULL, I2S5_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) {I2S2_HD_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_i2s_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) {I2S2_HD_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_i2s_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) {"I2S2", NULL, I2S0_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) {"I2S2", NULL, I2S1_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) {"I2S2", NULL, I2S2_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) {"I2S2", NULL, I2S3_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) {"I2S2", NULL, I2S5_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) {I2S2_MCLK_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_mclk_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) {I2S2_MCLK_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_mclk_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) /* i2s3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) {"I2S3_CH1", "DL1_CH1", "DL1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) {"I2S3_CH2", "DL1_CH2", "DL1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) {"I2S3_CH1", "DL2_CH1", "DL2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {"I2S3_CH2", "DL2_CH2", "DL2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) {"I2S3_CH1", "DL3_CH1", "DL3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {"I2S3_CH2", "DL3_CH2", "DL3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {"I2S3", NULL, "I2S3_CH1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) {"I2S3", NULL, "I2S3_CH2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) {"I2S3", NULL, "I2S0_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) {"I2S3", NULL, "I2S1_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) {"I2S3", NULL, "I2S2_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) {"I2S3", NULL, "I2S3_EN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) {"I2S3", NULL, "I2S5_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) {"I2S3", NULL, I2S0_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) {"I2S3", NULL, I2S1_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) {"I2S3", NULL, I2S2_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) {"I2S3", NULL, I2S3_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) {"I2S3", NULL, I2S5_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) {I2S3_HD_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_i2s_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) {I2S3_HD_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_i2s_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) {"I2S3", NULL, I2S0_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) {"I2S3", NULL, I2S1_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) {"I2S3", NULL, I2S2_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) {"I2S3", NULL, I2S3_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) {"I2S3", NULL, I2S5_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) {I2S3_MCLK_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_mclk_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {I2S3_MCLK_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_mclk_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) /* i2s5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) {"I2S5_CH1", "DL1_CH1", "DL1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) {"I2S5_CH2", "DL1_CH2", "DL1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) {"I2S5_CH1", "DL2_CH1", "DL2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) {"I2S5_CH2", "DL2_CH2", "DL2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {"I2S5_CH1", "DL3_CH1", "DL3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) {"I2S5_CH2", "DL3_CH2", "DL3"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) {"I2S5", NULL, "I2S5_CH1"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) {"I2S5", NULL, "I2S5_CH2"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) {"I2S5", NULL, "I2S0_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) {"I2S5", NULL, "I2S1_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) {"I2S5", NULL, "I2S2_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) {"I2S5", NULL, "I2S3_EN", mtk_afe_i2s_share_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) {"I2S5", NULL, "I2S5_EN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) {"I2S5", NULL, I2S0_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) {"I2S5", NULL, I2S1_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) {"I2S5", NULL, I2S2_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) {"I2S5", NULL, I2S3_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) {"I2S5", NULL, I2S5_HD_EN_W_NAME, mtk_afe_i2s_hd_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {I2S5_HD_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_i2s_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) {I2S5_HD_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_i2s_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {"I2S5", NULL, I2S0_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) {"I2S5", NULL, I2S1_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) {"I2S5", NULL, I2S2_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) {"I2S5", NULL, I2S3_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) {"I2S5", NULL, I2S5_MCLK_EN_W_NAME, mtk_afe_i2s_mclk_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) {I2S5_MCLK_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_mclk_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) {I2S5_MCLK_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_mclk_apll_connect},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) /* dai ops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) static int mtk_dai_i2s_config(struct mtk_base_afe *afe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) int i2s_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) struct mt8183_afe_private *afe_priv = afe->platform_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) struct mtk_afe_i2s_priv *i2s_priv = afe_priv->dai_priv[i2s_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) unsigned int rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) unsigned int rate_reg = mt8183_rate_transform(afe->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) rate, i2s_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) snd_pcm_format_t format = params_format(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) unsigned int i2s_con = 0, fmt_con = I2S_FMT_I2S << I2S_FMT_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) dev_info(afe->dev, "%s(), id %d, rate %d, format %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) i2s_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) rate, format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) if (i2s_priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) i2s_priv->rate = rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) if (i2s_priv->use_eiaj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) fmt_con = I2S_FMT_EIAJ << I2S_FMT_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) dev_warn(afe->dev, "%s(), i2s_priv == NULL", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) switch (i2s_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) case MT8183_DAI_I2S_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) regmap_update_bits(afe->regmap, AFE_DAC_CON1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) I2S_MODE_MASK_SFT, rate_reg << I2S_MODE_SFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) i2s_con = I2S_IN_PAD_IO_MUX << I2SIN_PAD_SEL_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) i2s_con |= fmt_con;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) i2s_con |= get_i2s_wlen(format) << I2S_WLEN_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) regmap_update_bits(afe->regmap, AFE_I2S_CON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) 0xffffeffe, i2s_con);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) case MT8183_DAI_I2S_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) i2s_con = I2S1_SEL_O28_O29 << I2S2_SEL_O03_O04_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) i2s_con |= rate_reg << I2S2_OUT_MODE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) i2s_con |= fmt_con;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) i2s_con |= get_i2s_wlen(format) << I2S2_WLEN_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) regmap_update_bits(afe->regmap, AFE_I2S_CON1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) 0xffffeffe, i2s_con);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) case MT8183_DAI_I2S_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) i2s_con = 8 << I2S3_UPDATE_WORD_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) i2s_con |= rate_reg << I2S3_OUT_MODE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) i2s_con |= fmt_con;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) i2s_con |= get_i2s_wlen(format) << I2S3_WLEN_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) regmap_update_bits(afe->regmap, AFE_I2S_CON2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) 0xffffeffe, i2s_con);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) case MT8183_DAI_I2S_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) i2s_con = rate_reg << I2S4_OUT_MODE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) i2s_con |= fmt_con;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) i2s_con |= get_i2s_wlen(format) << I2S4_WLEN_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) regmap_update_bits(afe->regmap, AFE_I2S_CON3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) 0xffffeffe, i2s_con);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) case MT8183_DAI_I2S_5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) i2s_con = rate_reg << I2S5_OUT_MODE_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) i2s_con |= fmt_con;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) i2s_con |= get_i2s_wlen(format) << I2S5_WLEN_SFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) regmap_update_bits(afe->regmap, AFE_I2S_CON4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) 0xffffeffe, i2s_con);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) dev_warn(afe->dev, "%s(), id %d not support\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) __func__, i2s_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) /* set share i2s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) if (i2s_priv && i2s_priv->share_i2s_id >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) ret = mtk_dai_i2s_config(afe, params, i2s_priv->share_i2s_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) static int mtk_dai_i2s_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) return mtk_dai_i2s_config(afe, params, dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) static int mtk_dai_i2s_set_sysclk(struct snd_soc_dai *dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) int clk_id, unsigned int freq, int dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) struct mtk_base_afe *afe = dev_get_drvdata(dai->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) struct mt8183_afe_private *afe_priv = afe->platform_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) struct mtk_afe_i2s_priv *i2s_priv = afe_priv->dai_priv[dai->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) int apll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) int apll_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) if (!i2s_priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) dev_warn(afe->dev, "%s(), i2s_priv == NULL", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) if (dir != SND_SOC_CLOCK_OUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) dev_warn(afe->dev, "%s(), dir != SND_SOC_CLOCK_OUT", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) dev_info(afe->dev, "%s(), freq %d\n", __func__, freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) apll = mt8183_get_apll_by_rate(afe, freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) apll_rate = mt8183_get_apll_rate(afe, apll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) if (freq > apll_rate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) dev_warn(afe->dev, "%s(), freq > apll rate", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) if (apll_rate % freq != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) dev_warn(afe->dev, "%s(), APLL cannot generate freq Hz",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) i2s_priv->mclk_rate = freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) i2s_priv->mclk_apll = apll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) if (i2s_priv->share_i2s_id > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) struct mtk_afe_i2s_priv *share_i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) share_i2s_priv = afe_priv->dai_priv[i2s_priv->share_i2s_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) if (!share_i2s_priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) dev_warn(afe->dev, "%s(), share_i2s_priv == NULL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) share_i2s_priv->mclk_rate = i2s_priv->mclk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) share_i2s_priv->mclk_apll = i2s_priv->mclk_apll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static int mtk_dai_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) struct mt8183_afe_private *afe_priv = afe->platform_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) struct mtk_afe_i2s_priv *i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) switch (dai->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) case MT8183_DAI_I2S_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) case MT8183_DAI_I2S_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) case MT8183_DAI_I2S_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) case MT8183_DAI_I2S_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) case MT8183_DAI_I2S_5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) dev_warn(afe->dev, "%s(), id %d not support\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) __func__, dai->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) i2s_priv = afe_priv->dai_priv[dai->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) case SND_SOC_DAIFMT_LEFT_J:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) i2s_priv->use_eiaj = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) case SND_SOC_DAIFMT_I2S:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) i2s_priv->use_eiaj = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) dev_warn(afe->dev, "%s(), DAI format %d not support\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) __func__, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) static const struct snd_soc_dai_ops mtk_dai_i2s_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) .hw_params = mtk_dai_i2s_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) .set_sysclk = mtk_dai_i2s_set_sysclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) .set_fmt = mtk_dai_i2s_set_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) /* dai driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) #define MTK_I2S_RATES (SNDRV_PCM_RATE_8000_48000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) SNDRV_PCM_RATE_88200 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) SNDRV_PCM_RATE_96000 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) SNDRV_PCM_RATE_176400 |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) SNDRV_PCM_RATE_192000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) #define MTK_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) SNDRV_PCM_FMTBIT_S24_LE |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) SNDRV_PCM_FMTBIT_S32_LE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) static struct snd_soc_dai_driver mtk_dai_i2s_driver[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) .name = "I2S0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) .id = MT8183_DAI_I2S_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) .stream_name = "I2S0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) .rates = MTK_I2S_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) .formats = MTK_I2S_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) .ops = &mtk_dai_i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) .name = "I2S1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) .id = MT8183_DAI_I2S_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) .stream_name = "I2S1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) .rates = MTK_I2S_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) .formats = MTK_I2S_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) .ops = &mtk_dai_i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) .name = "I2S2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) .id = MT8183_DAI_I2S_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) .stream_name = "I2S2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) .rates = MTK_I2S_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) .formats = MTK_I2S_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) .ops = &mtk_dai_i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) .name = "I2S3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) .id = MT8183_DAI_I2S_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) .stream_name = "I2S3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) .rates = MTK_I2S_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) .formats = MTK_I2S_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) .ops = &mtk_dai_i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) .name = "I2S5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) .id = MT8183_DAI_I2S_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) .stream_name = "I2S5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) .rates = MTK_I2S_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) .formats = MTK_I2S_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) .ops = &mtk_dai_i2s_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) /* this enum is merely for mtk_afe_i2s_priv declare */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) DAI_I2S0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) DAI_I2S1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) DAI_I2S2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) DAI_I2S3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) DAI_I2S5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) DAI_I2S_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) static const struct mtk_afe_i2s_priv mt8183_i2s_priv[DAI_I2S_NUM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) [DAI_I2S0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) .id = MT8183_DAI_I2S_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) .mclk_id = MT8183_I2S0_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) .share_property_name = "i2s0-share",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) .share_i2s_id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) [DAI_I2S1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) .id = MT8183_DAI_I2S_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) .mclk_id = MT8183_I2S1_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) .share_property_name = "i2s1-share",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) .share_i2s_id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) [DAI_I2S2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) .id = MT8183_DAI_I2S_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) .mclk_id = MT8183_I2S2_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) .share_property_name = "i2s2-share",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) .share_i2s_id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) [DAI_I2S3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) .id = MT8183_DAI_I2S_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) .mclk_id = MT8183_I2S3_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) .share_property_name = "i2s3-share",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) .share_i2s_id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) [DAI_I2S5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) .id = MT8183_DAI_I2S_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) .mclk_id = MT8183_I2S5_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) .share_property_name = "i2s5-share",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) .share_i2s_id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) static int mt8183_dai_i2s_get_share(struct mtk_base_afe *afe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) struct mt8183_afe_private *afe_priv = afe->platform_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) const struct device_node *of_node = afe->dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) const char *of_str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) const char *property_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) struct mtk_afe_i2s_priv *i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) for (i = 0; i < DAI_I2S_NUM; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) i2s_priv = afe_priv->dai_priv[mt8183_i2s_priv[i].id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) property_name = mt8183_i2s_priv[i].share_property_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) if (of_property_read_string(of_node, property_name, &of_str))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) i2s_priv->share_i2s_id = get_i2s_id_by_name(afe, of_str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) static int mt8183_dai_i2s_set_priv(struct mtk_base_afe *afe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) struct mt8183_afe_private *afe_priv = afe->platform_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) struct mtk_afe_i2s_priv *i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) for (i = 0; i < DAI_I2S_NUM; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) i2s_priv = devm_kzalloc(afe->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) sizeof(struct mtk_afe_i2s_priv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) if (!i2s_priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) memcpy(i2s_priv, &mt8183_i2s_priv[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) sizeof(struct mtk_afe_i2s_priv));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) afe_priv->dai_priv[mt8183_i2s_priv[i].id] = i2s_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) int mt8183_dai_i2s_register(struct mtk_base_afe *afe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) struct mtk_base_afe_dai *dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) if (!dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) list_add(&dai->list, &afe->sub_dais);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) dai->dai_drivers = mtk_dai_i2s_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_i2s_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) dai->controls = mtk_dai_i2s_controls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) dai->num_controls = ARRAY_SIZE(mtk_dai_i2s_controls);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) dai->dapm_widgets = mtk_dai_i2s_widgets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_i2s_widgets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) dai->dapm_routes = mtk_dai_i2s_routes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_i2s_routes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) /* set all dai i2s private data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) ret = mt8183_dai_i2s_set_priv(afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) /* parse share i2s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) ret = mt8183_dai_i2s_get_share(afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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