^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * mt8183-afe-common.h -- Mediatek 8183 audio driver definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2018 MediaTek Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef _MT_8183_AFE_COMMON_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define _MT_8183_AFE_COMMON_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "../common/mtk-base-afe.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) MT8183_MEMIF_DL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MT8183_MEMIF_DL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MT8183_MEMIF_DL3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MT8183_MEMIF_VUL12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MT8183_MEMIF_VUL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MT8183_MEMIF_AWB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MT8183_MEMIF_AWB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MT8183_MEMIF_MOD_DAI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MT8183_MEMIF_HDMI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MT8183_MEMIF_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MT8183_DAI_ADDA = MT8183_MEMIF_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MT8183_DAI_PCM_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MT8183_DAI_PCM_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MT8183_DAI_I2S_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MT8183_DAI_I2S_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MT8183_DAI_I2S_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MT8183_DAI_I2S_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MT8183_DAI_I2S_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MT8183_DAI_TDM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MT8183_DAI_HOSTLESS_LPBK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MT8183_DAI_HOSTLESS_SPEECH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) MT8183_DAI_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MT8183_IRQ_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MT8183_IRQ_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MT8183_IRQ_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MT8183_IRQ_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MT8183_IRQ_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) MT8183_IRQ_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) MT8183_IRQ_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MT8183_IRQ_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) MT8183_IRQ_8, /* hw bundle to TDM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MT8183_IRQ_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) MT8183_IRQ_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) MT8183_IRQ_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MT8183_MTKAIF_PROTOCOL_1 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MT8183_MTKAIF_PROTOCOL_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MT8183_MTKAIF_PROTOCOL_2_CLK_P2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* MCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) MT8183_I2S0_MCK = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MT8183_I2S1_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MT8183_I2S2_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MT8183_I2S3_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MT8183_I2S4_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MT8183_I2S4_BCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MT8183_I2S5_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MT8183_MCK_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct mt8183_afe_private {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct clk **clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) int pm_runtime_bypass_reg_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* dai */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) void *dai_priv[MT8183_DAI_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* adda */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int mtkaif_protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int mtkaif_calibration_ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) int mtkaif_chosen_phase[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int mtkaif_phase_cycle[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int mtkaif_calibration_num_phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int mtkaif_dmic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* mck */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) int mck_rate[MT8183_MCK_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned int mt8183_general_rate_transform(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) unsigned int rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) unsigned int mt8183_rate_transform(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned int rate, int aud_blk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* dai register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) int mt8183_dai_adda_register(struct mtk_base_afe *afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int mt8183_dai_pcm_register(struct mtk_base_afe *afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int mt8183_dai_i2s_register(struct mtk_base_afe *afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int mt8183_dai_tdm_register(struct mtk_base_afe *afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int mt8183_dai_hostless_register(struct mtk_base_afe *afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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