^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * mtk-base-afe.h -- Mediatek base afe structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2016 MediaTek Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Garlic Tseng <garlic.tseng@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef _MTK_BASE_AFE_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define _MTK_BASE_AFE_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define MTK_STREAM_NUM (SNDRV_PCM_STREAM_LAST + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct mtk_base_memif_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) int reg_ofs_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) int reg_ofs_cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) int reg_ofs_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) int reg_ofs_base_msb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) int reg_ofs_cur_msb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int reg_ofs_end_msb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) int fs_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) int fs_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) int fs_maskbit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) int mono_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int mono_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int mono_invert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int quad_ch_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int quad_ch_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int quad_ch_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int enable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) int enable_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) int hd_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int hd_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int hd_align_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int hd_align_mshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) int msb_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int msb_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int msb2_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int msb2_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int agent_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int agent_disable_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* playback memif only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) int pbuf_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int pbuf_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int pbuf_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int minlen_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int minlen_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int minlen_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct mtk_base_irq_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int irq_cnt_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int irq_cnt_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) int irq_cnt_maskbit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int irq_fs_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) int irq_fs_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) int irq_fs_maskbit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int irq_en_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int irq_en_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int irq_clr_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int irq_clr_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct list_head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct mtk_base_afe_memif;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct mtk_base_afe_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct mtk_base_afe_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct snd_pcm_substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct snd_soc_dai;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct mtk_base_afe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) void __iomem *base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct mutex irq_alloc_lock; /* dynamic alloc irq lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned int const *reg_back_up_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned int *reg_back_up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned int reg_back_up_list_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int (*runtime_suspend)(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int (*runtime_resume)(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) bool suspended;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct mtk_base_afe_memif *memif;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int memif_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct mtk_base_afe_irq *irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int irqs_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct list_head sub_dais;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct snd_soc_dai_driver *dai_drivers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned int num_dai_drivers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) const struct snd_pcm_hardware *mtk_afe_hardware;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int (*memif_fs)(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) unsigned int rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int (*irq_fs)(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned int rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int (*get_dai_fs)(struct mtk_base_afe *afe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int dai_id, unsigned int rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int (*get_memif_pbuf_size)(struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int (*request_dram_resource)(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) int (*release_dram_resource)(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void *platform_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct mtk_base_afe_memif {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) unsigned int phys_buf_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct snd_pcm_substream *substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) const struct mtk_base_memif_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int irq_usage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int const_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned char *dma_area;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) dma_addr_t dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) size_t dma_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct mtk_base_afe_irq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) const struct mtk_base_irq_data *irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int irq_occupyed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct mtk_base_afe_dai {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct snd_soc_dai_driver *dai_drivers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) unsigned int num_dai_drivers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) const struct snd_kcontrol_new *controls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) unsigned int num_controls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) const struct snd_soc_dapm_widget *dapm_widgets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) unsigned int num_dapm_widgets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) const struct snd_soc_dapm_route *dapm_routes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unsigned int num_dapm_routes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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