^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * mtk-afe-fe-dais.c -- Mediatek afe fe dai operator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2016 MediaTek Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Garlic Tseng <garlic.tseng@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "mtk-afe-platform-driver.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "mtk-afe-fe-dai.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "mtk-base-afe.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define AFE_BASE_END_OFFSET 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static int mtk_regmap_update_bits(struct regmap *map, int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) unsigned int mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned int val, int shift)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) if (reg < 0 || WARN_ON_ONCE(shift < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) return regmap_update_bits(map, reg, mask << shift, val << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static int mtk_regmap_write(struct regmap *map, int reg, unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) if (reg < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) return regmap_write(map, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int mtk_afe_fe_startup(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int memif_num = asoc_rtd_to_cpu(rtd, 0)->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct mtk_base_afe_memif *memif = &afe->memif[memif_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) const struct snd_pcm_hardware *mtk_afe_hardware = afe->mtk_afe_hardware;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) memif->substream = substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) snd_pcm_hw_constraint_step(substream->runtime, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* enable agent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) mtk_regmap_update_bits(afe->regmap, memif->data->agent_disable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 1, 0, memif->data->agent_disable_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) snd_soc_set_runtime_hwparams(substream, mtk_afe_hardware);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * Capture cannot use ping-pong buffer since hw_ptr at IRQ may be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * smaller than period_size due to AFE's internal buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * This easily leads to overrun when avail_min is period_size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * One more period can hold the possible unread buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int periods_max = mtk_afe_hardware->periods_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ret = snd_pcm_hw_constraint_minmax(runtime,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) SNDRV_PCM_HW_PARAM_PERIODS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 3, periods_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) dev_err(afe->dev, "hw_constraint_minmax failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ret = snd_pcm_hw_constraint_integer(runtime,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) SNDRV_PCM_HW_PARAM_PERIODS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) dev_err(afe->dev, "snd_pcm_hw_constraint_integer failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* dynamic allocate irq to memif */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (memif->irq_usage < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int irq_id = mtk_dynamic_irq_acquire(afe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (irq_id != afe->irqs_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* link */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) memif->irq_usage = irq_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) dev_err(afe->dev, "%s() error: no more asys irq\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) EXPORT_SYMBOL_GPL(mtk_afe_fe_startup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) void mtk_afe_fe_shutdown(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct mtk_base_afe_memif *memif = &afe->memif[asoc_rtd_to_cpu(rtd, 0)->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int irq_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) irq_id = memif->irq_usage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) mtk_regmap_update_bits(afe->regmap, memif->data->agent_disable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 1, 1, memif->data->agent_disable_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (!memif->const_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) mtk_dynamic_irq_release(afe, irq_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) memif->irq_usage = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) memif->substream = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) EXPORT_SYMBOL_GPL(mtk_afe_fe_shutdown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int mtk_afe_fe_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) int id = asoc_rtd_to_cpu(rtd, 0)->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct mtk_base_afe_memif *memif = &afe->memif[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unsigned int channels = params_channels(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) unsigned int rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) snd_pcm_format_t format = params_format(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (afe->request_dram_resource)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) afe->request_dram_resource(afe->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) dev_dbg(afe->dev, "%s(), %s, ch %d, rate %d, fmt %d, dma_addr %pad, dma_area %p, dma_bytes 0x%zx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) __func__, memif->data->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) channels, rate, format,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) &substream->runtime->dma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) substream->runtime->dma_area,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) substream->runtime->dma_bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) memset_io(substream->runtime->dma_area, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) substream->runtime->dma_bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* set addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ret = mtk_memif_set_addr(afe, id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) substream->runtime->dma_area,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) substream->runtime->dma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) substream->runtime->dma_bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) dev_err(afe->dev, "%s(), error, id %d, set addr, ret %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) __func__, id, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* set channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) ret = mtk_memif_set_channel(afe, id, channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) dev_err(afe->dev, "%s(), error, id %d, set channel %d, ret %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) __func__, id, channels, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* set rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) ret = mtk_memif_set_rate_substream(substream, id, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) dev_err(afe->dev, "%s(), error, id %d, set rate %d, ret %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) __func__, id, rate, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* set format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) ret = mtk_memif_set_format(afe, id, format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) dev_err(afe->dev, "%s(), error, id %d, set format %d, ret %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) __func__, id, format, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) EXPORT_SYMBOL_GPL(mtk_afe_fe_hw_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) int mtk_afe_fe_hw_free(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (afe->release_dram_resource)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) afe->release_dram_resource(afe->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) EXPORT_SYMBOL_GPL(mtk_afe_fe_hw_free);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) int mtk_afe_fe_trigger(struct snd_pcm_substream *substream, int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct snd_pcm_runtime * const runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int id = asoc_rtd_to_cpu(rtd, 0)->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct mtk_base_afe_memif *memif = &afe->memif[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct mtk_base_afe_irq *irqs = &afe->irqs[memif->irq_usage];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) const struct mtk_base_irq_data *irq_data = irqs->irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) unsigned int counter = runtime->period_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) int fs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) dev_dbg(afe->dev, "%s %s cmd=%d\n", __func__, memif->data->name, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) case SNDRV_PCM_TRIGGER_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) case SNDRV_PCM_TRIGGER_RESUME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ret = mtk_memif_set_enable(afe, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) dev_err(afe->dev, "%s(), error, id %d, memif enable, ret %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) __func__, id, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /* set irq counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) mtk_regmap_update_bits(afe->regmap, irq_data->irq_cnt_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) irq_data->irq_cnt_maskbit, counter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) irq_data->irq_cnt_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /* set irq fs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) fs = afe->irq_fs(substream, runtime->rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (fs < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) mtk_regmap_update_bits(afe->regmap, irq_data->irq_fs_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) irq_data->irq_fs_maskbit, fs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) irq_data->irq_fs_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* enable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) mtk_regmap_update_bits(afe->regmap, irq_data->irq_en_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 1, 1, irq_data->irq_en_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) case SNDRV_PCM_TRIGGER_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) case SNDRV_PCM_TRIGGER_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ret = mtk_memif_set_disable(afe, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) dev_err(afe->dev, "%s(), error, id %d, memif enable, ret %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) __func__, id, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) /* disable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) mtk_regmap_update_bits(afe->regmap, irq_data->irq_en_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 1, 0, irq_data->irq_en_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* and clear pending IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) mtk_regmap_write(afe->regmap, irq_data->irq_clr_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 1 << irq_data->irq_clr_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) EXPORT_SYMBOL_GPL(mtk_afe_fe_trigger);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) int mtk_afe_fe_prepare(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) int id = asoc_rtd_to_cpu(rtd, 0)->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) int pbuf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (afe->get_memif_pbuf_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) pbuf_size = afe->get_memif_pbuf_size(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) mtk_memif_set_pbuf_size(afe, id, pbuf_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) EXPORT_SYMBOL_GPL(mtk_afe_fe_prepare);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) const struct snd_soc_dai_ops mtk_afe_fe_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .startup = mtk_afe_fe_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .shutdown = mtk_afe_fe_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .hw_params = mtk_afe_fe_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .hw_free = mtk_afe_fe_hw_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .prepare = mtk_afe_fe_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .trigger = mtk_afe_fe_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) EXPORT_SYMBOL_GPL(mtk_afe_fe_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static DEFINE_MUTEX(irqs_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) int mtk_dynamic_irq_acquire(struct mtk_base_afe *afe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) mutex_lock(&afe->irq_alloc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) for (i = 0; i < afe->irqs_size; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (afe->irqs[i].irq_occupyed == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) afe->irqs[i].irq_occupyed = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) mutex_unlock(&afe->irq_alloc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) mutex_unlock(&afe->irq_alloc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return afe->irqs_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) EXPORT_SYMBOL_GPL(mtk_dynamic_irq_acquire);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) int mtk_dynamic_irq_release(struct mtk_base_afe *afe, int irq_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) mutex_lock(&afe->irq_alloc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (irq_id >= 0 && irq_id < afe->irqs_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) afe->irqs[irq_id].irq_occupyed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) mutex_unlock(&afe->irq_alloc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) mutex_unlock(&afe->irq_alloc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) EXPORT_SYMBOL_GPL(mtk_dynamic_irq_release);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) int mtk_afe_suspend(struct snd_soc_component *component)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct device *dev = afe->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct regmap *regmap = afe->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (pm_runtime_status_suspended(dev) || afe->suspended)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (!afe->reg_back_up)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) afe->reg_back_up =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) devm_kcalloc(dev, afe->reg_back_up_list_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) sizeof(unsigned int), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) for (i = 0; i < afe->reg_back_up_list_num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) regmap_read(regmap, afe->reg_back_up_list[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) &afe->reg_back_up[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) afe->suspended = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) afe->runtime_suspend(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) EXPORT_SYMBOL_GPL(mtk_afe_suspend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) int mtk_afe_resume(struct snd_soc_component *component)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct device *dev = afe->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) struct regmap *regmap = afe->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (pm_runtime_status_suspended(dev) || !afe->suspended)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) afe->runtime_resume(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (!afe->reg_back_up)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) dev_dbg(dev, "%s no reg_backup\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) for (i = 0; i < afe->reg_back_up_list_num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) mtk_regmap_write(regmap, afe->reg_back_up_list[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) afe->reg_back_up[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) afe->suspended = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) EXPORT_SYMBOL_GPL(mtk_afe_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) int mtk_memif_set_enable(struct mtk_base_afe *afe, int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct mtk_base_afe_memif *memif = &afe->memif[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (memif->data->enable_shift < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) dev_warn(afe->dev, "%s(), error, id %d, enable_shift < 0\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) __func__, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return mtk_regmap_update_bits(afe->regmap, memif->data->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 1, 1, memif->data->enable_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) EXPORT_SYMBOL_GPL(mtk_memif_set_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) int mtk_memif_set_disable(struct mtk_base_afe *afe, int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) struct mtk_base_afe_memif *memif = &afe->memif[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (memif->data->enable_shift < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) dev_warn(afe->dev, "%s(), error, id %d, enable_shift < 0\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) __func__, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) return mtk_regmap_update_bits(afe->regmap, memif->data->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 1, 0, memif->data->enable_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) EXPORT_SYMBOL_GPL(mtk_memif_set_disable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) int mtk_memif_set_addr(struct mtk_base_afe *afe, int id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) unsigned char *dma_area,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) dma_addr_t dma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) size_t dma_bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct mtk_base_afe_memif *memif = &afe->memif[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) int msb_at_bit33 = upper_32_bits(dma_addr) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) unsigned int phys_buf_addr = lower_32_bits(dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) unsigned int phys_buf_addr_upper_32 = upper_32_bits(dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) memif->dma_area = dma_area;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) memif->dma_addr = dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) memif->dma_bytes = dma_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /* start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) mtk_regmap_write(afe->regmap, memif->data->reg_ofs_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) phys_buf_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) /* end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (memif->data->reg_ofs_end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) mtk_regmap_write(afe->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) memif->data->reg_ofs_end,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) phys_buf_addr + dma_bytes - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) mtk_regmap_write(afe->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) memif->data->reg_ofs_base +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) AFE_BASE_END_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) phys_buf_addr + dma_bytes - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) /* set start, end, upper 32 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (memif->data->reg_ofs_base_msb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) mtk_regmap_write(afe->regmap, memif->data->reg_ofs_base_msb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) phys_buf_addr_upper_32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) mtk_regmap_write(afe->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) memif->data->reg_ofs_end_msb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) phys_buf_addr_upper_32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) /* set MSB to 33-bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (memif->data->msb_reg >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) mtk_regmap_update_bits(afe->regmap, memif->data->msb_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 1, msb_at_bit33, memif->data->msb_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) EXPORT_SYMBOL_GPL(mtk_memif_set_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) int mtk_memif_set_channel(struct mtk_base_afe *afe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) int id, unsigned int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) struct mtk_base_afe_memif *memif = &afe->memif[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) unsigned int mono;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (memif->data->mono_shift < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (memif->data->quad_ch_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) unsigned int quad_ch = (channel == 4) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) mtk_regmap_update_bits(afe->regmap, memif->data->quad_ch_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) memif->data->quad_ch_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) quad_ch, memif->data->quad_ch_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) if (memif->data->mono_invert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) mono = (channel == 1) ? 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) mono = (channel == 1) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return mtk_regmap_update_bits(afe->regmap, memif->data->mono_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 1, mono, memif->data->mono_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) EXPORT_SYMBOL_GPL(mtk_memif_set_channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static int mtk_memif_set_rate_fs(struct mtk_base_afe *afe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) int id, int fs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) struct mtk_base_afe_memif *memif = &afe->memif[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (memif->data->fs_shift >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) mtk_regmap_update_bits(afe->regmap, memif->data->fs_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) memif->data->fs_maskbit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) fs, memif->data->fs_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) int mtk_memif_set_rate(struct mtk_base_afe *afe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) int id, unsigned int rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) int fs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (!afe->get_dai_fs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) dev_err(afe->dev, "%s(), error, afe->get_dai_fs == NULL\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) fs = afe->get_dai_fs(afe, id, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) if (fs < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) return mtk_memif_set_rate_fs(afe, id, fs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) EXPORT_SYMBOL_GPL(mtk_memif_set_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) int mtk_memif_set_rate_substream(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) int id, unsigned int rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) struct snd_soc_component *component =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) int fs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (!afe->memif_fs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) dev_err(afe->dev, "%s(), error, afe->memif_fs == NULL\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) fs = afe->memif_fs(substream, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (fs < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) return mtk_memif_set_rate_fs(afe, id, fs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) EXPORT_SYMBOL_GPL(mtk_memif_set_rate_substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) int mtk_memif_set_format(struct mtk_base_afe *afe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) int id, snd_pcm_format_t format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) struct mtk_base_afe_memif *memif = &afe->memif[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) int hd_audio = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) int hd_align = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) /* set hd mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) switch (format) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) case SNDRV_PCM_FORMAT_S16_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) case SNDRV_PCM_FORMAT_U16_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) hd_audio = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) case SNDRV_PCM_FORMAT_S32_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) case SNDRV_PCM_FORMAT_U32_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) hd_audio = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) hd_align = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) case SNDRV_PCM_FORMAT_S24_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) case SNDRV_PCM_FORMAT_U24_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) hd_audio = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) dev_err(afe->dev, "%s() error: unsupported format %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) __func__, format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) mtk_regmap_update_bits(afe->regmap, memif->data->hd_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 1, hd_audio, memif->data->hd_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) mtk_regmap_update_bits(afe->regmap, memif->data->hd_align_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 1, hd_align, memif->data->hd_align_mshift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) EXPORT_SYMBOL_GPL(mtk_memif_set_format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) int mtk_memif_set_pbuf_size(struct mtk_base_afe *afe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) int id, int pbuf_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) const struct mtk_base_memif_data *memif_data = afe->memif[id].data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (memif_data->pbuf_mask == 0 || memif_data->minlen_mask == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) mtk_regmap_update_bits(afe->regmap, memif_data->pbuf_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) memif_data->pbuf_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) pbuf_size, memif_data->pbuf_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) mtk_regmap_update_bits(afe->regmap, memif_data->minlen_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) memif_data->minlen_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) pbuf_size, memif_data->minlen_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) EXPORT_SYMBOL_GPL(mtk_memif_set_pbuf_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) MODULE_DESCRIPTION("Mediatek simple fe dai operator");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) MODULE_AUTHOR("Garlic Tseng <garlic.tseng@mediatek.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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