^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Intel Smart Sound Technology
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013, Intel Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __SOUND_SOC_SST_DSP_PRIV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __SOUND_SOC_SST_DSP_PRIV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "../skylake/skl-sst-dsp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * DSP Operations exported by platform Audio DSP driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct sst_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* Shim IO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) void (*write)(void __iomem *addr, u32 offset, u32 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) u32 (*read)(void __iomem *addr, u32 offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* IRQ handlers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) irqreturn_t (*irq_handler)(int irq, void *context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* SST init and free */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int (*init)(struct sst_dsp *sst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) void (*free)(struct sst_dsp *sst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Audio DSP memory offsets and addresses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct sst_addr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u32 sram0_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u32 sram1_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u32 w0_stat_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u32 w0_up_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) void __iomem *lpe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) void __iomem *shim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * Audio DSP Mailbox configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct sst_mailbox {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void __iomem *in_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) void __iomem *out_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) size_t in_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) size_t out_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * Generic SST Shim Interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct sst_dsp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* Shared for all platforms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct sst_dsp_device *sst_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) spinlock_t spinlock; /* IPC locking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct mutex mutex; /* DSP FW lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) void *thread_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u32 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct sst_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* debug FS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct dentry *debugfs_root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* base addresses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct sst_addr addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* mailbox */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct sst_mailbox mailbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* SST FW files loaded and their modules */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct list_head module_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* SKL data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) const char *fw_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* To allocate CL dma buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct skl_dsp_loader_ops dsp_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct skl_dsp_fw_ops fw_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) int sst_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct skl_cl_dev cl_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) u32 intr_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) const struct firmware *fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct snd_dma_buffer dmab;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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