^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Pistachio internal dac driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015 Imagination Technologies Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Damien Horsley <Damien.Horsley@imgtec.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PISTACHIO_INTERNAL_DAC_CTRL 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PISTACHIO_INTERNAL_DAC_CTRL_PWR_SEL_MASK 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PISTACHIO_INTERNAL_DAC_CTRL_PWRDN_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PISTACHIO_INTERNAL_DAC_SRST 0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PISTACHIO_INTERNAL_DAC_SRST_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PISTACHIO_INTERNAL_DAC_GTI_CTRL 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PISTACHIO_INTERNAL_DAC_GTI_CTRL_ADDR_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PISTACHIO_INTERNAL_DAC_GTI_CTRL_ADDR_MASK 0xFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define PISTACHIO_INTERNAL_DAC_GTI_CTRL_WE_MASK 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define PISTACHIO_INTERNAL_DAC_GTI_CTRL_WDATA_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PISTACHIO_INTERNAL_DAC_GTI_CTRL_WDATA_MASK 0x1FE000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PISTACHIO_INTERNAL_DAC_PWR 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define PISTACHIO_INTERNAL_DAC_PWR_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define PISTACHIO_INTERNAL_DAC_FORMATS (SNDRV_PCM_FMTBIT_S24_LE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) SNDRV_PCM_FMTBIT_S32_LE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* codec private data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct pistachio_internal_dac {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct regulator *supply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) bool mute;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static const struct snd_kcontrol_new pistachio_internal_dac_snd_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) SOC_SINGLE("Playback Switch", PISTACHIO_INTERNAL_DAC_CTRL, 2, 1, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static const struct snd_soc_dapm_widget pistachio_internal_dac_widgets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) SND_SOC_DAPM_OUTPUT("AOUTL"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) SND_SOC_DAPM_OUTPUT("AOUTR"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static const struct snd_soc_dapm_route pistachio_internal_dac_routes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) { "AOUTL", NULL, "DAC" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) { "AOUTR", NULL, "DAC" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static void pistachio_internal_dac_reg_writel(struct regmap *top_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u32 val, u32 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) regmap_update_bits(top_regs, PISTACHIO_INTERNAL_DAC_GTI_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PISTACHIO_INTERNAL_DAC_GTI_CTRL_ADDR_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) reg << PISTACHIO_INTERNAL_DAC_GTI_CTRL_ADDR_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) regmap_update_bits(top_regs, PISTACHIO_INTERNAL_DAC_GTI_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) PISTACHIO_INTERNAL_DAC_GTI_CTRL_WDATA_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) val << PISTACHIO_INTERNAL_DAC_GTI_CTRL_WDATA_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) regmap_update_bits(top_regs, PISTACHIO_INTERNAL_DAC_GTI_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) PISTACHIO_INTERNAL_DAC_GTI_CTRL_WE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) PISTACHIO_INTERNAL_DAC_GTI_CTRL_WE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) regmap_update_bits(top_regs, PISTACHIO_INTERNAL_DAC_GTI_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) PISTACHIO_INTERNAL_DAC_GTI_CTRL_WE_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static void pistachio_internal_dac_pwr_off(struct pistachio_internal_dac *dac)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) regmap_update_bits(dac->regmap, PISTACHIO_INTERNAL_DAC_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) PISTACHIO_INTERNAL_DAC_CTRL_PWRDN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PISTACHIO_INTERNAL_DAC_CTRL_PWRDN_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) pistachio_internal_dac_reg_writel(dac->regmap, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PISTACHIO_INTERNAL_DAC_PWR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static void pistachio_internal_dac_pwr_on(struct pistachio_internal_dac *dac)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) regmap_update_bits(dac->regmap, PISTACHIO_INTERNAL_DAC_SRST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PISTACHIO_INTERNAL_DAC_SRST_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PISTACHIO_INTERNAL_DAC_SRST_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) regmap_update_bits(dac->regmap, PISTACHIO_INTERNAL_DAC_SRST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PISTACHIO_INTERNAL_DAC_SRST_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) pistachio_internal_dac_reg_writel(dac->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PISTACHIO_INTERNAL_DAC_PWR_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PISTACHIO_INTERNAL_DAC_PWR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) regmap_update_bits(dac->regmap, PISTACHIO_INTERNAL_DAC_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PISTACHIO_INTERNAL_DAC_CTRL_PWRDN_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static struct snd_soc_dai_driver pistachio_internal_dac_dais[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .name = "pistachio_internal_dac",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .stream_name = "Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .channels_min = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .rates = SNDRV_PCM_RATE_8000_48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .formats = PISTACHIO_INTERNAL_DAC_FORMATS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int pistachio_internal_dac_codec_probe(struct snd_soc_component *component)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct pistachio_internal_dac *dac = snd_soc_component_get_drvdata(component);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) snd_soc_component_init_regmap(component, dac->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static const struct snd_soc_component_driver pistachio_internal_dac_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .probe = pistachio_internal_dac_codec_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .controls = pistachio_internal_dac_snd_controls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .num_controls = ARRAY_SIZE(pistachio_internal_dac_snd_controls),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .dapm_widgets = pistachio_internal_dac_widgets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .num_dapm_widgets = ARRAY_SIZE(pistachio_internal_dac_widgets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .dapm_routes = pistachio_internal_dac_routes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .num_dapm_routes = ARRAY_SIZE(pistachio_internal_dac_routes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .use_pmdown_time = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .endianness = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .non_legacy_dai_naming = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int pistachio_internal_dac_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct pistachio_internal_dac *dac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) int ret, voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) dac = devm_kzalloc(dev, sizeof(*dac), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (!dac)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) platform_set_drvdata(pdev, dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) dac->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) "img,cr-top");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (IS_ERR(dac->regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return PTR_ERR(dac->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) dac->supply = devm_regulator_get(dev, "VDD");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (IS_ERR(dac->supply)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) ret = PTR_ERR(dac->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (ret != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) dev_err(dev, "failed to acquire supply 'VDD-supply': %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ret = regulator_enable(dac->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) dev_err(dev, "failed to enable supply: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) voltage = regulator_get_voltage(dac->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) switch (voltage) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) case 1800000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) case 3300000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) reg = PISTACHIO_INTERNAL_DAC_CTRL_PWR_SEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) dev_err(dev, "invalid voltage: %d\n", voltage);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) goto err_regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) regmap_update_bits(dac->regmap, PISTACHIO_INTERNAL_DAC_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) PISTACHIO_INTERNAL_DAC_CTRL_PWR_SEL_MASK, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) pistachio_internal_dac_pwr_off(dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) pistachio_internal_dac_pwr_on(dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) pm_runtime_set_active(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) pm_runtime_idle(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) ret = devm_snd_soc_register_component(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) &pistachio_internal_dac_driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) pistachio_internal_dac_dais,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ARRAY_SIZE(pistachio_internal_dac_dais));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) dev_err(dev, "failed to register component: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) goto err_pwr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) err_pwr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) pm_runtime_disable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) pistachio_internal_dac_pwr_off(dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) err_regulator:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) regulator_disable(dac->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static int pistachio_internal_dac_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct pistachio_internal_dac *dac = dev_get_drvdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) pm_runtime_disable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) pistachio_internal_dac_pwr_off(dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) regulator_disable(dac->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static int pistachio_internal_dac_rt_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct pistachio_internal_dac *dac = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ret = regulator_enable(dac->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) dev_err(dev, "failed to enable supply: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) pistachio_internal_dac_pwr_on(dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static int pistachio_internal_dac_rt_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct pistachio_internal_dac *dac = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) pistachio_internal_dac_pwr_off(dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) regulator_disable(dac->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static const struct dev_pm_ops pistachio_internal_dac_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) SET_RUNTIME_PM_OPS(pistachio_internal_dac_rt_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) pistachio_internal_dac_rt_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static const struct of_device_id pistachio_internal_dac_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) { .compatible = "img,pistachio-internal-dac" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) MODULE_DEVICE_TABLE(of, pistachio_internal_dac_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static struct platform_driver pistachio_internal_dac_plat_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .name = "img-pistachio-internal-dac",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .of_match_table = pistachio_internal_dac_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .pm = &pistachio_internal_dac_pm_ops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .probe = pistachio_internal_dac_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .remove = pistachio_internal_dac_remove
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) module_platform_driver(pistachio_internal_dac_plat_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) MODULE_DESCRIPTION("Pistachio Internal DAC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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