^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // wm1133-ev1.c - Audio for WM1133-EV1 on i.MX31ADS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (c) 2010 Wolfson Microelectronics plc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // Based on an earlier driver for the same hardware by Liam Girdwood.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <sound/jack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "imx-ssi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "../codecs/wm8350.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "imx-audmux.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* There is a silicon mic on the board optionally connected via a solder pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * SP1. Define this to enable it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #undef USE_SIMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct _wm8350_audio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) unsigned int channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) snd_pcm_format_t format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned int rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned int sysclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int bclkdiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned int clkdiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned int lr_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* in order of power consumption per rate (lowest first) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static const struct _wm8350_audio wm8350_audio[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* 16bit mono modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {1, SNDRV_PCM_FORMAT_S16_LE, 8000, 12288000 >> 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) WM8350_BCLK_DIV_48, WM8350_DACDIV_3, 16,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* 16 bit stereo modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {2, SNDRV_PCM_FORMAT_S16_LE, 8000, 12288000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) WM8350_BCLK_DIV_48, WM8350_DACDIV_6, 32,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {2, SNDRV_PCM_FORMAT_S16_LE, 16000, 12288000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) WM8350_BCLK_DIV_24, WM8350_DACDIV_3, 32,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {2, SNDRV_PCM_FORMAT_S16_LE, 32000, 12288000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) WM8350_BCLK_DIV_12, WM8350_DACDIV_1_5, 32,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {2, SNDRV_PCM_FORMAT_S16_LE, 48000, 12288000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {2, SNDRV_PCM_FORMAT_S16_LE, 96000, 24576000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {2, SNDRV_PCM_FORMAT_S16_LE, 11025, 11289600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) WM8350_BCLK_DIV_32, WM8350_DACDIV_4, 32,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {2, SNDRV_PCM_FORMAT_S16_LE, 22050, 11289600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) WM8350_BCLK_DIV_16, WM8350_DACDIV_2, 32,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {2, SNDRV_PCM_FORMAT_S16_LE, 44100, 11289600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {2, SNDRV_PCM_FORMAT_S16_LE, 88200, 22579200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* 24bit stereo modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {2, SNDRV_PCM_FORMAT_S24_LE, 48000, 12288000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {2, SNDRV_PCM_FORMAT_S24_LE, 96000, 24576000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {2, SNDRV_PCM_FORMAT_S24_LE, 44100, 11289600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {2, SNDRV_PCM_FORMAT_S24_LE, 88200, 22579200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static int wm1133_ev1_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct snd_pcm_hw_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int i, found = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) snd_pcm_format_t format = params_format(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned int rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned int channels = params_channels(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* find the correct audio parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) for (i = 0; i < ARRAY_SIZE(wm8350_audio); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (rate == wm8350_audio[i].rate &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) format == wm8350_audio[i].format &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) channels == wm8350_audio[i].channels) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) found = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (!found)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* codec FLL input is 14.75 MHz from MCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) snd_soc_dai_set_pll(codec_dai, 0, 0, 14750000, wm8350_audio[i].sysclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* TODO: The SSI driver should figure this out for us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) switch (channels) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) snd_soc_dai_set_tdm_slot(cpu_dai, 0x3, 0x3, 2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) snd_soc_dai_set_tdm_slot(cpu_dai, 0x1, 0x1, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* set MCLK as the codec system clock for DAC and ADC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) snd_soc_dai_set_sysclk(codec_dai, WM8350_MCLK_SEL_PLL_MCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) wm8350_audio[i].sysclk, SND_SOC_CLOCK_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* set codec BCLK division for sample rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) snd_soc_dai_set_clkdiv(codec_dai, WM8350_BCLK_CLKDIV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) wm8350_audio[i].bclkdiv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* DAI is synchronous and clocked with DAC LRCLK & ADC LRC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) snd_soc_dai_set_clkdiv(codec_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) WM8350_DACLR_CLKDIV, wm8350_audio[i].lr_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) snd_soc_dai_set_clkdiv(codec_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) WM8350_ADCLR_CLKDIV, wm8350_audio[i].lr_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* now configure DAC and ADC clocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) snd_soc_dai_set_clkdiv(codec_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) WM8350_DAC_CLKDIV, wm8350_audio[i].clkdiv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) snd_soc_dai_set_clkdiv(codec_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) WM8350_ADC_CLKDIV, wm8350_audio[i].clkdiv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const struct snd_soc_ops wm1133_ev1_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .hw_params = wm1133_ev1_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static const struct snd_soc_dapm_widget wm1133_ev1_widgets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #ifdef USE_SIMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) SND_SOC_DAPM_MIC("SiMIC", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) SND_SOC_DAPM_MIC("Mic1 Jack", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) SND_SOC_DAPM_MIC("Mic2 Jack", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) SND_SOC_DAPM_LINE("Line In Jack", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) SND_SOC_DAPM_LINE("Line Out Jack", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) SND_SOC_DAPM_HP("Headphone Jack", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* imx32ads soc_card audio map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static const struct snd_soc_dapm_route wm1133_ev1_map[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #ifdef USE_SIMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* SiMIC --> IN1LN (with automatic bias) via SP1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) { "IN1LN", NULL, "Mic Bias" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) { "Mic Bias", NULL, "SiMIC" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* Mic 1 Jack --> IN1LN and IN1LP (with automatic bias) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) { "IN1LN", NULL, "Mic Bias" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) { "IN1LP", NULL, "Mic1 Jack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) { "Mic Bias", NULL, "Mic1 Jack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /* Mic 2 Jack --> IN1RN and IN1RP (with automatic bias) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) { "IN1RN", NULL, "Mic Bias" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) { "IN1RP", NULL, "Mic2 Jack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) { "Mic Bias", NULL, "Mic2 Jack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /* Line in Jack --> AUX (L+R) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) { "IN3R", NULL, "Line In Jack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) { "IN3L", NULL, "Line In Jack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /* Out1 --> Headphone Jack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) { "Headphone Jack", NULL, "OUT1R" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) { "Headphone Jack", NULL, "OUT1L" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* Out1 --> Line Out Jack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) { "Line Out Jack", NULL, "OUT2R" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) { "Line Out Jack", NULL, "OUT2L" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static struct snd_soc_jack hp_jack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static struct snd_soc_jack_pin hp_jack_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) { .pin = "Headphone Jack", .mask = SND_JACK_HEADPHONE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static struct snd_soc_jack mic_jack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static struct snd_soc_jack_pin mic_jack_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) { .pin = "Mic1 Jack", .mask = SND_JACK_MICROPHONE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) { .pin = "Mic2 Jack", .mask = SND_JACK_MICROPHONE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static int wm1133_ev1_init(struct snd_soc_pcm_runtime *rtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct snd_soc_component *component = asoc_rtd_to_codec(rtd, 0)->component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* Headphone jack detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) snd_soc_card_jack_new(rtd->card, "Headphone", SND_JACK_HEADPHONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) &hp_jack, hp_jack_pins, ARRAY_SIZE(hp_jack_pins));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) wm8350_hp_jack_detect(component, WM8350_JDR, &hp_jack, SND_JACK_HEADPHONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /* Microphone jack detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) snd_soc_card_jack_new(rtd->card, "Microphone",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) SND_JACK_MICROPHONE | SND_JACK_BTN_0, &mic_jack,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) mic_jack_pins, ARRAY_SIZE(mic_jack_pins));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) wm8350_mic_jack_detect(component, &mic_jack, SND_JACK_MICROPHONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) SND_JACK_BTN_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) snd_soc_dapm_force_enable_pin(&rtd->card->dapm, "Mic Bias");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) SND_SOC_DAILINK_DEFS(ev1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) DAILINK_COMP_ARRAY(COMP_CPU("imx-ssi.0")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) DAILINK_COMP_ARRAY(COMP_CODEC("wm8350-codec.0-0x1a", "wm8350-hifi")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) DAILINK_COMP_ARRAY(COMP_PLATFORM("imx-ssi.0")));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static struct snd_soc_dai_link wm1133_ev1_dai = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .name = "WM1133-EV1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .stream_name = "Audio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .init = wm1133_ev1_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .ops = &wm1133_ev1_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .symmetric_rates = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) SND_SOC_DAIFMT_CBM_CFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) SND_SOC_DAILINK_REG(ev1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static struct snd_soc_card wm1133_ev1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .name = "WM1133-EV1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .dai_link = &wm1133_ev1_dai,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .num_links = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .dapm_widgets = wm1133_ev1_widgets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .num_dapm_widgets = ARRAY_SIZE(wm1133_ev1_widgets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .dapm_routes = wm1133_ev1_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .num_dapm_routes = ARRAY_SIZE(wm1133_ev1_map),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static struct platform_device *wm1133_ev1_snd_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static int __init wm1133_ev1_audio_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) unsigned int ptcr, pdcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* SSI0 mastered by port 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ptcr = IMX_AUDMUX_V2_PTCR_SYN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) IMX_AUDMUX_V2_PTCR_TFSDIR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) IMX_AUDMUX_V2_PTCR_TFSEL(MX31_AUDMUX_PORT5_SSI_PINS_5) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) IMX_AUDMUX_V2_PTCR_TCLKDIR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) IMX_AUDMUX_V2_PTCR_TCSEL(MX31_AUDMUX_PORT5_SSI_PINS_5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT5_SSI_PINS_5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) imx_audmux_v2_configure_port(MX31_AUDMUX_PORT1_SSI0, ptcr, pdcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) ptcr = IMX_AUDMUX_V2_PTCR_SYN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT1_SSI0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) imx_audmux_v2_configure_port(MX31_AUDMUX_PORT5_SSI_PINS_5, ptcr, pdcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) wm1133_ev1_snd_device = platform_device_alloc("soc-audio", -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (!wm1133_ev1_snd_device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) platform_set_drvdata(wm1133_ev1_snd_device, &wm1133_ev1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ret = platform_device_add(wm1133_ev1_snd_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) platform_device_put(wm1133_ev1_snd_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) module_init(wm1133_ev1_audio_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static void __exit wm1133_ev1_audio_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) platform_device_unregister(wm1133_ev1_snd_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) module_exit(wm1133_ev1_audio_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) MODULE_DESCRIPTION("Audio for WM1133-EV1 on i.MX31ADS");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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