Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // Copyright 2012 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) // Copyright 2012 Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) // Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) // Initial development of this code was funded by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) // Phytec Messtechnik GmbH, https://www.phytec.de
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include "imx-audmux.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define DRIVER_NAME "imx-audmux"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) static struct clk *audmux_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) static void __iomem *audmux_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static u32 *regcache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) static u32 reg_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define IMX_AUDMUX_V2_PTCR(x)		((x) * 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define IMX_AUDMUX_V2_PDCR(x)		((x) * 8 + 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) static struct dentry *audmux_debugfs_root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) /* There is an annoying discontinuity in the SSI numbering with regard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * to the Linux number of the devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) static const char *audmux_port_string(int port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	switch (port) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	case MX31_AUDMUX_PORT1_SSI0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		return "imx-ssi.0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	case MX31_AUDMUX_PORT2_SSI1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		return "imx-ssi.1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	case MX31_AUDMUX_PORT3_SSI_PINS_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		return "SSI3";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	case MX31_AUDMUX_PORT4_SSI_PINS_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		return "SSI4";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	case MX31_AUDMUX_PORT5_SSI_PINS_5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		return "SSI5";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	case MX31_AUDMUX_PORT6_SSI_PINS_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		return "SSI6";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		return "UNKNOWN";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static ssize_t audmux_read_file(struct file *file, char __user *user_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 				size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	ssize_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	char *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	uintptr_t port = (uintptr_t)file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	u32 pdcr, ptcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	if (audmux_clk) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		ret = clk_prepare_enable(audmux_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	ptcr = readl(audmux_base + IMX_AUDMUX_V2_PTCR(port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	pdcr = readl(audmux_base + IMX_AUDMUX_V2_PDCR(port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	if (audmux_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		clk_disable_unprepare(audmux_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	ret = scnprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		       pdcr, ptcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (ptcr & IMX_AUDMUX_V2_PTCR_TFSDIR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		ret += scnprintf(buf + ret, PAGE_SIZE - ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 				"TxFS output from %s, ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 				audmux_port_string((ptcr >> 27) & 0x7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		ret += scnprintf(buf + ret, PAGE_SIZE - ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 				"TxFS input, ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	if (ptcr & IMX_AUDMUX_V2_PTCR_TCLKDIR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		ret += scnprintf(buf + ret, PAGE_SIZE - ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 				"TxClk output from %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 				audmux_port_string((ptcr >> 22) & 0x7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		ret += scnprintf(buf + ret, PAGE_SIZE - ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 				"TxClk input");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	if (ptcr & IMX_AUDMUX_V2_PTCR_SYN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		ret += scnprintf(buf + ret, PAGE_SIZE - ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				"Port is symmetric");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		if (ptcr & IMX_AUDMUX_V2_PTCR_RFSDIR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			ret += scnprintf(buf + ret, PAGE_SIZE - ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 					"RxFS output from %s, ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 					audmux_port_string((ptcr >> 17) & 0x7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			ret += scnprintf(buf + ret, PAGE_SIZE - ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 					"RxFS input, ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		if (ptcr & IMX_AUDMUX_V2_PTCR_RCLKDIR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 			ret += scnprintf(buf + ret, PAGE_SIZE - ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 					"RxClk output from %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 					audmux_port_string((ptcr >> 12) & 0x7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			ret += scnprintf(buf + ret, PAGE_SIZE - ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 					"RxClk input");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	ret += scnprintf(buf + ret, PAGE_SIZE - ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			"\nData received from %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			audmux_port_string((pdcr >> 13) & 0x7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static const struct file_operations audmux_debugfs_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	.open = simple_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	.read = audmux_read_file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	.llseek = default_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static void audmux_debugfs_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	uintptr_t i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	char buf[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	audmux_debugfs_root = debugfs_create_dir("audmux", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	for (i = 0; i < MX31_AUDMUX_PORT7_SSI_PINS_7 + 1; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		snprintf(buf, sizeof(buf), "ssi%lu", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		debugfs_create_file(buf, 0444, audmux_debugfs_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 				    (void *)i, &audmux_debugfs_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static void audmux_debugfs_remove(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	debugfs_remove_recursive(audmux_debugfs_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static inline void audmux_debugfs_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static inline void audmux_debugfs_remove(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static enum imx_audmux_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	IMX21_AUDMUX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	IMX31_AUDMUX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) } audmux_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static const struct platform_device_id imx_audmux_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		.name = "imx21-audmux",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		.driver_data = IMX21_AUDMUX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		.name = "imx31-audmux",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		.driver_data = IMX31_AUDMUX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		/* sentinel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) MODULE_DEVICE_TABLE(platform, imx_audmux_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static const struct of_device_id imx_audmux_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	{ .compatible = "fsl,imx21-audmux", .data = &imx_audmux_ids[0], },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	{ .compatible = "fsl,imx31-audmux", .data = &imx_audmux_ids[1], },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	{ /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) MODULE_DEVICE_TABLE(of, imx_audmux_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static const uint8_t port_mapping[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	0x0, 0x4, 0x8, 0x10, 0x14, 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) int imx_audmux_v1_configure_port(unsigned int port, unsigned int pcr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	if (audmux_type != IMX21_AUDMUX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	if (!audmux_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	if (port >= ARRAY_SIZE(port_mapping))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	writel(pcr, audmux_base + port_mapping[port]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) EXPORT_SYMBOL_GPL(imx_audmux_v1_configure_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) int imx_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		unsigned int pdcr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if (audmux_type != IMX31_AUDMUX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	if (!audmux_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	if (audmux_clk) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		ret = clk_prepare_enable(audmux_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	writel(ptcr, audmux_base + IMX_AUDMUX_V2_PTCR(port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	writel(pdcr, audmux_base + IMX_AUDMUX_V2_PDCR(port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	if (audmux_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		clk_disable_unprepare(audmux_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) EXPORT_SYMBOL_GPL(imx_audmux_v2_configure_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static int imx_audmux_parse_dt_defaults(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		struct device_node *of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	struct device_node *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	for_each_available_child_of_node(of_node, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		unsigned int port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		unsigned int ptcr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		unsigned int pdcr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		unsigned int pcr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		ret = of_property_read_u32(child, "fsl,audmux-port", &port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 			dev_warn(&pdev->dev, "Failed to get fsl,audmux-port of child node \"%pOF\"\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 					child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		if (!of_property_read_bool(child, "fsl,port-config")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			dev_warn(&pdev->dev, "child node \"%pOF\" does not have property fsl,port-config\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 					child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		for (i = 0; (ret = of_property_read_u32_index(child,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 					"fsl,port-config", i, &val)) == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 				++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 			if (audmux_type == IMX31_AUDMUX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 				if (i % 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 					pdcr |= val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 				else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 					ptcr |= val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 			} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 				pcr |= val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		if (ret != -EOVERFLOW) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 			dev_err(&pdev->dev, "Failed to read u32 at index %d of child %pOF\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 					i, child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		if (audmux_type == IMX31_AUDMUX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 			if (i % 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 				dev_err(&pdev->dev, "One pdcr value is missing in child node %pOF\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 						child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 			imx_audmux_v2_configure_port(port, ptcr, pdcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 			imx_audmux_v1_configure_port(port, pcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static int imx_audmux_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	const struct of_device_id *of_id =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 			of_match_device(imx_audmux_dt_ids, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	audmux_base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	if (IS_ERR(audmux_base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		return PTR_ERR(audmux_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	audmux_clk = devm_clk_get(&pdev->dev, "audmux");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	if (IS_ERR(audmux_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		dev_dbg(&pdev->dev, "cannot get clock: %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 				PTR_ERR(audmux_clk));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		audmux_clk = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	if (of_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 		pdev->id_entry = of_id->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	audmux_type = pdev->id_entry->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	switch (audmux_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	case IMX31_AUDMUX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		audmux_debugfs_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		reg_max = 14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	case IMX21_AUDMUX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		reg_max = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		dev_err(&pdev->dev, "unsupported version!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	regcache = devm_kzalloc(&pdev->dev, sizeof(u32) * reg_max, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	if (!regcache)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	if (of_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 		imx_audmux_parse_dt_defaults(pdev, pdev->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static int imx_audmux_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	if (audmux_type == IMX31_AUDMUX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		audmux_debugfs_remove();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static int imx_audmux_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	clk_prepare_enable(audmux_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	for (i = 0; i < reg_max; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 		regcache[i] = readl(audmux_base + i * 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	clk_disable_unprepare(audmux_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static int imx_audmux_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	clk_prepare_enable(audmux_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	for (i = 0; i < reg_max; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		writel(regcache[i], audmux_base + i * 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	clk_disable_unprepare(audmux_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) #endif /* CONFIG_PM_SLEEP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static const struct dev_pm_ops imx_audmux_pm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	SET_SYSTEM_SLEEP_PM_OPS(imx_audmux_suspend, imx_audmux_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) static struct platform_driver imx_audmux_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	.probe		= imx_audmux_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	.remove		= imx_audmux_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	.id_table	= imx_audmux_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	.driver	= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		.name	= DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 		.pm = &imx_audmux_pm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 		.of_match_table = imx_audmux_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static int __init imx_audmux_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	return platform_driver_register(&imx_audmux_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) subsys_initcall(imx_audmux_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static void __exit imx_audmux_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	platform_driver_unregister(&imx_audmux_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) module_exit(imx_audmux_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) MODULE_DESCRIPTION("Freescale i.MX AUDMUX driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) MODULE_ALIAS("platform:" DRIVER_NAME);