^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Au12x0/Au1550 PSC ALSA ASoC audio support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (c) 2007-2009 MSC Vertriebsges.m.b.H.,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Manuel Lauss <manuel.lauss@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Au1xxx-PSC AC97 glue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <sound/initval.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach-au1x00/au1000.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mach-au1x00/au1xxx_psc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "psc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* how often to retry failed codec register reads/writes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define AC97_RW_RETRIES 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define AC97_DIR \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define AC97_RATES \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) SNDRV_PCM_RATE_8000_48000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define AC97_FMTS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define AC97PCR_START(stype) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TS : PSC_AC97PCR_RS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define AC97PCR_STOP(stype) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TP : PSC_AC97PCR_RP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define AC97PCR_CLRFIFO(stype) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TC : PSC_AC97PCR_RC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define AC97STAT_BUSY(stype) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97STAT_TB : PSC_AC97STAT_RB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* instance data. There can be only one, MacLeod!!!! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static struct au1xpsc_audio_data *au1xpsc_ac97_workdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* this could theoretically work, but ac97->bus->card->private_data can be NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * when snd_ac97_mixer() is called; I don't know if the rest further down the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * chain are always valid either.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static inline struct au1xpsc_audio_data *ac97_to_pscdata(struct snd_ac97 *x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct snd_soc_card *c = x->bus->card->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return snd_soc_dai_get_drvdata(c->asoc_rtd_to_cpu(rtd, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define ac97_to_pscdata(x) au1xpsc_ac97_workdata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* AC97 controller reads codec register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static unsigned short au1xpsc_ac97_read(struct snd_ac97 *ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned short reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned short retry, tmo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned long data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) retry = AC97_RW_RETRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) mutex_lock(&pscdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) __raw_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) AC97_CDC(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) tmo = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) udelay(21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (__raw_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) } while (--tmo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) data = __raw_readl(AC97_CDC(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) mutex_unlock(&pscdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (reg != ((data >> 16) & 0x7f))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) tmo = 1; /* wrong register, try again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) } while (--retry && !tmo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return retry ? data & 0xffff : 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* AC97 controller writes to codec register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static void au1xpsc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned short val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned int tmo, retry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) retry = AC97_RW_RETRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) mutex_lock(&pscdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) __raw_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) AC97_CDC(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) tmo = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) udelay(21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (__raw_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) } while (--tmo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) mutex_unlock(&pscdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) } while (--retry && !tmo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* AC97 controller asserts a warm reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static void au1xpsc_ac97_warm_reset(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) __raw_writel(PSC_AC97RST_SNC, AC97_RST(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) __raw_writel(0, AC97_RST(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* disable PSC during cold reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) __raw_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /* issue cold reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) __raw_writel(PSC_AC97RST_RST, AC97_RST(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) msleep(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) __raw_writel(0, AC97_RST(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /* enable PSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) __raw_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* wait for PSC to indicate it's ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) i = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) while (!((__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (i == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* enable the ac97 function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) __raw_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /* wait for AC97 core to become ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) i = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) while (!((__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (i == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* AC97 controller operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static struct snd_ac97_bus_ops psc_ac97_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .read = au1xpsc_ac97_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .write = au1xpsc_ac97_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .reset = au1xpsc_ac97_cold_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .warm_reset = au1xpsc_ac97_warm_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) unsigned long r, ro, stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) int chans, t, stype = substream->stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) chans = params_channels(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) r = ro = __raw_readl(AC97_CFG(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) stat = __raw_readl(AC97_STAT(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /* already active? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /* reject parameters not currently set up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) (pscdata->rate != params_rate(params)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) r &= ~PSC_AC97CFG_LEN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) r |= PSC_AC97CFG_SET_LEN(params->msbits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* channels: enable slots for front L/R channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (stype == SNDRV_PCM_STREAM_PLAYBACK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) r &= ~PSC_AC97CFG_TXSLOT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) r |= PSC_AC97CFG_TXSLOT_ENA(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) r |= PSC_AC97CFG_TXSLOT_ENA(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) r &= ~PSC_AC97CFG_RXSLOT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) r |= PSC_AC97CFG_RXSLOT_ENA(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) r |= PSC_AC97CFG_RXSLOT_ENA(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /* do we need to poke the hardware? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (!(r ^ ro))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /* ac97 engine is about to be disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) mutex_lock(&pscdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) /* disable AC97 device controller first... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) __raw_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* ...wait for it... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) t = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) while ((__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR) && --t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (!t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) printk(KERN_ERR "PSC-AC97: can't disable!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* ...write config... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) __raw_writel(r, AC97_CFG(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* ...enable the AC97 controller again... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) __raw_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /* ...and wait for ready bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) t = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) while ((!(__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && --t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (!t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) printk(KERN_ERR "PSC-AC97: can't enable!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) mutex_unlock(&pscdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) pscdata->cfg = r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) pscdata->rate = params_rate(params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) int cmd, struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) int ret, stype = substream->stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) case SNDRV_PCM_TRIGGER_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) case SNDRV_PCM_TRIGGER_RESUME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) __raw_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) __raw_writel(AC97PCR_START(stype), AC97_PCR(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) case SNDRV_PCM_TRIGGER_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) case SNDRV_PCM_TRIGGER_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) __raw_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) while (__raw_readl(AC97_STAT(pscdata)) & AC97STAT_BUSY(stype))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) asm volatile ("nop");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) __raw_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int au1xpsc_ac97_startup(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) snd_soc_dai_set_dma_data(dai, substream, &pscdata->dmaids[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static int au1xpsc_ac97_probe(struct snd_soc_dai *dai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return au1xpsc_ac97_workdata ? 0 : -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static const struct snd_soc_dai_ops au1xpsc_ac97_dai_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .startup = au1xpsc_ac97_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .trigger = au1xpsc_ac97_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .hw_params = au1xpsc_ac97_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static const struct snd_soc_dai_driver au1xpsc_ac97_dai_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .probe = au1xpsc_ac97_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .rates = AC97_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .formats = AC97_FMTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .channels_min = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .rates = AC97_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .formats = AC97_FMTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .channels_min = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .ops = &au1xpsc_ac97_dai_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static const struct snd_soc_component_driver au1xpsc_ac97_component = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .name = "au1xpsc-ac97",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) static int au1xpsc_ac97_drvprobe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct resource *dmares;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) unsigned long sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) struct au1xpsc_audio_data *wd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) wd = devm_kzalloc(&pdev->dev, sizeof(struct au1xpsc_audio_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (!wd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) mutex_init(&wd->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) wd->mmio = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (IS_ERR(wd->mmio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return PTR_ERR(wd->mmio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (!dmares)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) wd->dmaids[SNDRV_PCM_STREAM_PLAYBACK] = dmares->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) dmares = platform_get_resource(pdev, IORESOURCE_DMA, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (!dmares)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) wd->dmaids[SNDRV_PCM_STREAM_CAPTURE] = dmares->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) /* configuration: max dma trigger threshold, enable ac97 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) wd->cfg = PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) PSC_AC97CFG_DE_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /* preserve PSC clock source set up by platform */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) sel = __raw_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) __raw_writel(0, PSC_SEL(wd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) __raw_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(wd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) /* name the DAI like this device instance ("au1xpsc-ac97.PSCINDEX") */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) memcpy(&wd->dai_drv, &au1xpsc_ac97_dai_template,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) sizeof(struct snd_soc_dai_driver));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) wd->dai_drv.name = dev_name(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) platform_set_drvdata(pdev, wd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) ret = snd_soc_set_ac97_ops(&psc_ac97_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) ret = snd_soc_register_component(&pdev->dev, &au1xpsc_ac97_component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) &wd->dai_drv, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) au1xpsc_ac97_workdata = wd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static int au1xpsc_ac97_drvremove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) snd_soc_unregister_component(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) /* disable PSC completely */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) __raw_writel(0, AC97_CFG(wd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) au1xpsc_ac97_workdata = NULL; /* MDEV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static int au1xpsc_ac97_drvsuspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) /* save interesting registers and disable PSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) wd->pm[0] = __raw_readl(PSC_SEL(wd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) __raw_writel(0, AC97_CFG(wd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) static int au1xpsc_ac97_drvresume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /* restore PSC clock config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) __raw_writel(wd->pm[0] | PSC_SEL_PS_AC97MODE, PSC_SEL(wd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) wmb(); /* drain writebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) /* after this point the ac97 core will cold-reset the codec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) * During cold-reset the PSC is reinitialized and the last
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) * configuration set up in hw_params() is restored.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static const struct dev_pm_ops au1xpscac97_pmops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .suspend = au1xpsc_ac97_drvsuspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .resume = au1xpsc_ac97_drvresume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) #define AU1XPSCAC97_PMOPS &au1xpscac97_pmops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) #define AU1XPSCAC97_PMOPS NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) static struct platform_driver au1xpsc_ac97_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) .name = "au1xpsc_ac97",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) .pm = AU1XPSCAC97_PMOPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) .probe = au1xpsc_ac97_drvprobe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) .remove = au1xpsc_ac97_drvremove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) module_platform_driver(au1xpsc_ac97_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) MODULE_AUTHOR("Manuel Lauss");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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