^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * atmel-pcm-dma.c -- ALSA PCM DMA support for the Atmel SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2012 Atmel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Bo Shen <voice.shen@atmel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Based on atmel-pcm by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Sedji Gaouaou <sedji.gaouaou@atmel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Copyright 2008 Atmel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/dmaengine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/atmel-ssc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <sound/dmaengine_pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include "atmel-pcm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*--------------------------------------------------------------------------*\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * Hardware definition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) \*--------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static const struct snd_pcm_hardware atmel_pcm_dma_hardware = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .info = SNDRV_PCM_INFO_MMAP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) SNDRV_PCM_INFO_MMAP_VALID |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) SNDRV_PCM_INFO_INTERLEAVED |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) SNDRV_PCM_INFO_RESUME |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) SNDRV_PCM_INFO_PAUSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .period_bytes_min = 256, /* lighting DMA overhead */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .period_bytes_max = 2 * 0xffff, /* if 2 bytes format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .periods_min = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .periods_max = 1024, /* no limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .buffer_bytes_max = 512 * 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * atmel_pcm_dma_irq: SSC interrupt handler for DMAENGINE enabled SSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * We use DMAENGINE to send/receive data to/from SSC so this ISR is only to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * check if any overrun occured.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static void atmel_pcm_dma_irq(u32 ssc_sr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct atmel_pcm_dma_params *prtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) prtd = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (ssc_sr & prtd->mask->ssc_error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (snd_pcm_running(substream))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) pr_warn("atmel-pcm: buffer %s on %s (SSC_SR=%#x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) substream->stream == SNDRV_PCM_STREAM_PLAYBACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ? "underrun" : "overrun", prtd->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ssc_sr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* stop RX and capture: will be enabled again at restart */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) ssc_writex(prtd->ssc->regs, SSC_CR, prtd->mask->ssc_disable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) snd_pcm_stop_xrun(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* now drain RHR and read status to remove xrun condition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ssc_readx(prtd->ssc->regs, SSC_RHR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) ssc_readx(prtd->ssc->regs, SSC_SR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static int atmel_pcm_configure_dma(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct atmel_pcm_dma_params *prtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct ssc_device *ssc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) prtd = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ssc = prtd->ssc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) pr_err("atmel-pcm: hwparams to dma slave configure failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) slave_config->dst_addr = ssc->phybase + SSC_THR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) slave_config->dst_maxburst = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) slave_config->src_addr = ssc->phybase + SSC_RHR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) slave_config->src_maxburst = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) prtd->dma_intr_handler = atmel_pcm_dma_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static const struct snd_dmaengine_pcm_config atmel_dmaengine_pcm_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .prepare_slave_config = atmel_pcm_configure_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .pcm_hardware = &atmel_pcm_dma_hardware,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .prealloc_buffer_size = 64 * 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int atmel_pcm_dma_platform_register(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return devm_snd_dmaengine_pcm_register(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) &atmel_dmaengine_pcm_config, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) EXPORT_SYMBOL(atmel_pcm_dma_platform_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) MODULE_AUTHOR("Bo Shen <voice.shen@atmel.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) MODULE_DESCRIPTION("Atmel DMA based PCM module");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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