Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) * Copyright Adrian McMenamin 2005, 2006, 2007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) * <adrian@mcmen.demon.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) * Requires firmware (BSD licenced) available from:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) * http://linuxdc.cvs.sourceforge.net/linuxdc/linux-sh-dc/sound/oss/aica/firmware/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) * or the maintainer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <sound/control.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <sound/initval.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <sound/info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <mach/sysasic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include "aica.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) MODULE_AUTHOR("Adrian McMenamin <adrian@mcmen.demon.co.uk>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) MODULE_DESCRIPTION("Dreamcast AICA sound (pcm) driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) MODULE_SUPPORTED_DEVICE("{{Yamaha/SEGA, AICA}}");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) MODULE_FIRMWARE("aica_firmware.bin");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /* module parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define CARD_NAME "AICA"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static int index = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static char *id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static bool enable = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) module_param(index, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) module_param(id, charp, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) module_param(enable, bool, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) MODULE_PARM_DESC(enable, "Enable " CARD_NAME " soundcard.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) /* Simple platform device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static struct platform_device *pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static struct resource aica_memory_space[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	 .name = "AICA ARM CONTROL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	 .start = ARM_RESET_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	 .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	 .end = ARM_RESET_REGISTER + 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	 .name = "AICA Sound RAM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	 .start = SPU_MEMORY_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	 .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	 .end = SPU_MEMORY_BASE + 0x200000 - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) /* SPU specific functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) /* spu_write_wait - wait for G2-SH FIFO to clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) static void spu_write_wait(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	int time_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	time_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	while (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		if (!(readl(G2_FIFO) & 0x11))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		/* To ensure hardware failure doesn't wedge kernel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		time_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		if (time_count > 0x10000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			snd_printk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			    ("WARNING: G2 FIFO appears to be blocked.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) /* spu_memset - write to memory in SPU address space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static void spu_memset(u32 toi, u32 what, int length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	if (snd_BUG_ON(length % 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	for (i = 0; i < length; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		if (!(i % 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 			spu_write_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		writel(what, toi + SPU_MEMORY_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		toi++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* spu_memload - write to SPU address space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static void spu_memload(u32 toi, const void *from, int length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	const u32 *froml = from;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	u32 __iomem *to = (u32 __iomem *) (SPU_MEMORY_BASE + toi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	length = DIV_ROUND_UP(length, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	spu_write_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	for (i = 0; i < length; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		if (!(i % 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 			spu_write_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		val = *froml;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		writel(val, to);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		froml++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		to++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* spu_disable - set spu registers to stop sound output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static void spu_disable(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	u32 regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	spu_write_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	regval = readl(ARM_RESET_REGISTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	regval |= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	spu_write_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	writel(regval, ARM_RESET_REGISTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	for (i = 0; i < 64; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		spu_write_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		regval = readl(SPU_REGISTER_BASE + (i * 0x80));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		regval = (regval & ~0x4000) | 0x8000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		spu_write_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		writel(regval, SPU_REGISTER_BASE + (i * 0x80));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* spu_enable - set spu registers to enable sound output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static void spu_enable(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	u32 regval = readl(ARM_RESET_REGISTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	regval &= ~1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	spu_write_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	writel(regval, ARM_RESET_REGISTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)  * Halt the sound processor, clear the memory,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)  * load some default ARM7 code, and then restart ARM7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static void spu_reset(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	spu_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	spu_memset(0, 0, 0x200000 / 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	/* Put ARM7 in endless loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	__raw_writel(0xea000002, SPU_MEMORY_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	spu_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* aica_chn_start - write to spu to start playback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static void aica_chn_start(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	spu_write_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	writel(AICA_CMD_KICK | AICA_CMD_START, (u32 *) AICA_CONTROL_POINT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* aica_chn_halt - write to spu to halt playback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static void aica_chn_halt(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	spu_write_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	writel(AICA_CMD_KICK | AICA_CMD_STOP, (u32 *) AICA_CONTROL_POINT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* ALSA code below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static const struct snd_pcm_hardware snd_pcm_aica_playback_hw = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	.info = (SNDRV_PCM_INFO_NONINTERLEAVED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	.formats =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	    (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	     SNDRV_PCM_FMTBIT_IMA_ADPCM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	.rates = SNDRV_PCM_RATE_8000_48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	.rate_min = 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	.rate_max = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	.channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	.channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	.buffer_bytes_max = AICA_BUFFER_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	.period_bytes_min = AICA_PERIOD_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	.period_bytes_max = AICA_PERIOD_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	.periods_min = AICA_PERIOD_NUMBER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	.periods_max = AICA_PERIOD_NUMBER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static int aica_dma_transfer(int channels, int buffer_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 			     struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	int q, err, period_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	struct snd_card_aica *dreamcastcard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	struct snd_pcm_runtime *runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	dreamcastcard = substream->pcm->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	period_offset = dreamcastcard->clicks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	period_offset %= (AICA_PERIOD_NUMBER / channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	for (q = 0; q < channels; q++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		err = dma_xfer(AICA_DMA_CHANNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 			       (unsigned long) (runtime->dma_area +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 						(AICA_BUFFER_SIZE * q) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 						channels +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 						AICA_PERIOD_SIZE *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 						period_offset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			       AICA_CHANNEL0_OFFSET + q * CHANNEL_OFFSET +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			       AICA_PERIOD_SIZE * period_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			       buffer_size / channels, AICA_DMA_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		if (unlikely(err < 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		dma_wait_for_completion(AICA_DMA_CHANNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static void startup_aica(struct snd_card_aica *dreamcastcard)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	spu_memload(AICA_CHANNEL0_CONTROL_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		    dreamcastcard->channel, sizeof(struct aica_channel));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	aica_chn_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static void run_spu_dma(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	int buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	struct snd_pcm_runtime *runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	struct snd_card_aica *dreamcastcard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	dreamcastcard =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	    container_of(work, struct snd_card_aica, spu_dma_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	runtime = dreamcastcard->substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	if (unlikely(dreamcastcard->dma_check == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		buffer_size =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		    frames_to_bytes(runtime, runtime->buffer_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		if (runtime->channels > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			dreamcastcard->channel->flags |= 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		aica_dma_transfer(runtime->channels, buffer_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 				  dreamcastcard->substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		startup_aica(dreamcastcard);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		dreamcastcard->clicks =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		    buffer_size / (AICA_PERIOD_SIZE * runtime->channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		aica_dma_transfer(runtime->channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 				  AICA_PERIOD_SIZE * runtime->channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 				  dreamcastcard->substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		snd_pcm_period_elapsed(dreamcastcard->substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		dreamcastcard->clicks++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		if (unlikely(dreamcastcard->clicks >= AICA_PERIOD_NUMBER))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 			dreamcastcard->clicks %= AICA_PERIOD_NUMBER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		mod_timer(&dreamcastcard->timer, jiffies + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static void aica_period_elapsed(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	struct snd_card_aica *dreamcastcard = from_timer(dreamcastcard,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 							      t, timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	struct snd_pcm_substream *substream = dreamcastcard->substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	/*timer function - so cannot sleep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	int play_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	struct snd_pcm_runtime *runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	dreamcastcard = substream->pcm->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	/* Have we played out an additional period? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	play_period =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	    frames_to_bytes(runtime,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			    readl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 			    (AICA_CONTROL_CHANNEL_SAMPLE_NUMBER)) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	    AICA_PERIOD_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	if (play_period == dreamcastcard->current_period) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 		/* reschedule the timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		mod_timer(&(dreamcastcard->timer), jiffies + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	if (runtime->channels > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		dreamcastcard->current_period = play_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	if (unlikely(dreamcastcard->dma_check == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		dreamcastcard->dma_check = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	schedule_work(&(dreamcastcard->spu_dma_work));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static void spu_begin_dma(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	struct snd_card_aica *dreamcastcard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	struct snd_pcm_runtime *runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	dreamcastcard = substream->pcm->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	/*get the queue to do the work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	schedule_work(&(dreamcastcard->spu_dma_work));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	mod_timer(&dreamcastcard->timer, jiffies + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static int snd_aicapcm_pcm_open(struct snd_pcm_substream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 				*substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	struct snd_pcm_runtime *runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	struct aica_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	struct snd_card_aica *dreamcastcard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	if (!enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	dreamcastcard = substream->pcm->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	channel = kmalloc(sizeof(struct aica_channel), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	if (!channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	/* set defaults for channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	channel->sfmt = SM_8BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	channel->cmd = AICA_CMD_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	channel->vol = dreamcastcard->master_volume;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	channel->pan = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	channel->pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	channel->flags = 0;	/* default to mono */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	dreamcastcard->channel = channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	runtime->hw = snd_pcm_aica_playback_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	spu_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	dreamcastcard->clicks = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	dreamcastcard->current_period = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	dreamcastcard->dma_check = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static int snd_aicapcm_pcm_close(struct snd_pcm_substream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 				 *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	struct snd_card_aica *dreamcastcard = substream->pcm->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	flush_work(&(dreamcastcard->spu_dma_work));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	del_timer(&dreamcastcard->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	dreamcastcard->substream = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	kfree(dreamcastcard->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	spu_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) static int snd_aicapcm_pcm_prepare(struct snd_pcm_substream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 				   *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	struct snd_card_aica *dreamcastcard = substream->pcm->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	if ((substream->runtime)->format == SNDRV_PCM_FORMAT_S16_LE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 		dreamcastcard->channel->sfmt = SM_16BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	dreamcastcard->channel->freq = substream->runtime->rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	dreamcastcard->substream = substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static int snd_aicapcm_pcm_trigger(struct snd_pcm_substream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 				   *substream, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	case SNDRV_PCM_TRIGGER_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		spu_begin_dma(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	case SNDRV_PCM_TRIGGER_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		aica_chn_halt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static unsigned long snd_aicapcm_pcm_pointer(struct snd_pcm_substream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 					     *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	return readl(AICA_CONTROL_CHANNEL_SAMPLE_NUMBER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static const struct snd_pcm_ops snd_aicapcm_playback_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	.open = snd_aicapcm_pcm_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	.close = snd_aicapcm_pcm_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	.prepare = snd_aicapcm_pcm_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	.trigger = snd_aicapcm_pcm_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	.pointer = snd_aicapcm_pcm_pointer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) /* TO DO: set up to handle more than one pcm instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static int __init snd_aicapcmchip(struct snd_card_aica
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 				  *dreamcastcard, int pcm_index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	struct snd_pcm *pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	/* AICA has no capture ability */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	err =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	    snd_pcm_new(dreamcastcard->card, "AICA PCM", pcm_index, 1, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 			&pcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	pcm->private_data = dreamcastcard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	strcpy(pcm->name, "AICA PCM");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 			&snd_aicapcm_playback_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	/* Allocate the DMA buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	snd_pcm_set_managed_buffer_all(pcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 				       SNDRV_DMA_TYPE_CONTINUOUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 				       NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 				       AICA_BUFFER_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 				       AICA_BUFFER_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) /* Mixer controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) #define aica_pcmswitch_info		snd_ctl_boolean_mono_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) static int aica_pcmswitch_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 			      struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	ucontrol->value.integer.value[0] = 1;	/* TO DO: Fix me */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static int aica_pcmswitch_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 			      struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	if (ucontrol->value.integer.value[0] == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 		return 0;	/* TO DO: Fix me */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 		aica_chn_halt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) static int aica_pcmvolume_info(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 			       struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	uinfo->count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	uinfo->value.integer.min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	uinfo->value.integer.max = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) static int aica_pcmvolume_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 			      struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	struct snd_card_aica *dreamcastcard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	dreamcastcard = kcontrol->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	if (unlikely(!dreamcastcard->channel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 		return -ETXTBSY;	/* we've not yet been set up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	ucontrol->value.integer.value[0] = dreamcastcard->channel->vol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static int aica_pcmvolume_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 			      struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	struct snd_card_aica *dreamcastcard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	unsigned int vol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	dreamcastcard = kcontrol->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	if (unlikely(!dreamcastcard->channel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 		return -ETXTBSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	vol = ucontrol->value.integer.value[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	if (vol > 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	if (unlikely(dreamcastcard->channel->vol == vol))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 	dreamcastcard->channel->vol = ucontrol->value.integer.value[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	dreamcastcard->master_volume = ucontrol->value.integer.value[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	spu_memload(AICA_CHANNEL0_CONTROL_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 		    dreamcastcard->channel, sizeof(struct aica_channel));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) static const struct snd_kcontrol_new snd_aica_pcmswitch_control = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	.name = "PCM Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	.index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	.info = aica_pcmswitch_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	.get = aica_pcmswitch_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	.put = aica_pcmswitch_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static const struct snd_kcontrol_new snd_aica_pcmvolume_control = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	.name = "PCM Playback Volume",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	.index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 	.info = aica_pcmvolume_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	.get = aica_pcmvolume_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	.put = aica_pcmvolume_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static int load_aica_firmware(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	const struct firmware *fw_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 	spu_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	err = request_firmware(&fw_entry, "aica_firmware.bin", &pd->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 	if (unlikely(err))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	/* write firmware into memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 	spu_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	spu_memload(0, fw_entry->data, fw_entry->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	spu_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	release_firmware(fw_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) static int add_aicamixer_controls(struct snd_card_aica *dreamcastcard)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	err = snd_ctl_add
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 	    (dreamcastcard->card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	     snd_ctl_new1(&snd_aica_pcmvolume_control, dreamcastcard));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	err = snd_ctl_add
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	    (dreamcastcard->card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	     snd_ctl_new1(&snd_aica_pcmswitch_control, dreamcastcard));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static int snd_aica_remove(struct platform_device *devptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	struct snd_card_aica *dreamcastcard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 	dreamcastcard = platform_get_drvdata(devptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 	if (unlikely(!dreamcastcard))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 	snd_card_free(dreamcastcard->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 	kfree(dreamcastcard);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) static int snd_aica_probe(struct platform_device *devptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	struct snd_card_aica *dreamcastcard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	dreamcastcard = kzalloc(sizeof(struct snd_card_aica), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	if (unlikely(!dreamcastcard))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 	err = snd_card_new(&devptr->dev, index, SND_AICA_DRIVER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 			   THIS_MODULE, 0, &dreamcastcard->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	if (unlikely(err < 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 		kfree(dreamcastcard);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 	strcpy(dreamcastcard->card->driver, "snd_aica");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 	strcpy(dreamcastcard->card->shortname, SND_AICA_DRIVER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 	strcpy(dreamcastcard->card->longname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 	       "Yamaha AICA Super Intelligent Sound Processor for SEGA Dreamcast");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 	/* Prepare to use the queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 	INIT_WORK(&(dreamcastcard->spu_dma_work), run_spu_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 	timer_setup(&dreamcastcard->timer, aica_period_elapsed, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 	/* Load the PCM 'chip' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 	err = snd_aicapcmchip(dreamcastcard, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 	if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 		goto freedreamcast;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 	/* Add basic controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 	err = add_aicamixer_controls(dreamcastcard);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 	if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 		goto freedreamcast;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 	/* Register the card with ALSA subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 	err = snd_card_register(dreamcastcard->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 	if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 		goto freedreamcast;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 	platform_set_drvdata(devptr, dreamcastcard);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 	snd_printk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 	    ("ALSA Driver for Yamaha AICA Super Intelligent Sound Processor\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)       freedreamcast:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 	snd_card_free(dreamcastcard->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 	kfree(dreamcastcard);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) static struct platform_driver snd_aica_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 	.probe = snd_aica_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 	.remove = snd_aica_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 		.name = SND_AICA_DRIVER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) static int __init aica_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 	err = platform_driver_register(&snd_aica_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 	if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 	pd = platform_device_register_simple(SND_AICA_DRIVER, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 					     aica_memory_space, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 	if (IS_ERR(pd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 		platform_driver_unregister(&snd_aica_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 		return PTR_ERR(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) 	/* Load the firmware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 	return load_aica_firmware();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) static void __exit aica_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 	platform_device_unregister(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 	platform_driver_unregister(&snd_aica_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 	/* Kill any sound still playing and reset ARM7 to safe state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 	spu_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) module_init(aica_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) module_exit(aica_exit);