Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Driver for Sound Core PDAudioCF soundcards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * PCM part
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (c) 2003 by Jaroslav Kysela <perex@perex.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <sound/asoundef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include "pdaudiocf.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * clear the SRAM contents
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) static int pdacf_pcm_clear_sram(struct snd_pdacf *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	int max_loop = 64 * 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	while (inw(chip->port + PDAUDIOCF_REG_RDP) != inw(chip->port + PDAUDIOCF_REG_WDP)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 		if (max_loop-- < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 			return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 		inw(chip->port + PDAUDIOCF_REG_MD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * pdacf_pcm_trigger - trigger callback for capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static int pdacf_pcm_trigger(struct snd_pcm_substream *subs, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	struct snd_pdacf *chip = snd_pcm_substream_chip(subs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	struct snd_pcm_runtime *runtime = subs->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	int inc, ret = 0, rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	unsigned short mask, val, tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	if (chip->chip_status & PDAUDIOCF_STAT_IS_STALE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	case SNDRV_PCM_TRIGGER_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		chip->pcm_hwptr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		chip->pcm_tdone = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	case SNDRV_PCM_TRIGGER_RESUME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		val = PDAUDIOCF_RECORD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		inc = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		rate = snd_ak4117_check_rate_and_errors(chip->ak4117, AK4117_CHECK_NO_STAT|AK4117_CHECK_NO_RATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	case SNDRV_PCM_TRIGGER_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	case SNDRV_PCM_TRIGGER_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		mask = PDAUDIOCF_RECORD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		inc = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		rate = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	mutex_lock(&chip->reg_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	chip->pcm_running += inc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	if (chip->pcm_running) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		if ((chip->ak4117->rcs0 & AK4117_UNLCK) || runtime->rate != rate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			chip->pcm_running -= inc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			goto __end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	tmp &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	tmp |= val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)       __end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	mutex_unlock(&chip->reg_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	snd_ak4117_check_rate_and_errors(chip->ak4117, AK4117_CHECK_NO_RATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  * pdacf_pcm_prepare - prepare callback for playback and capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static int pdacf_pcm_prepare(struct snd_pcm_substream *subs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct snd_pdacf *chip = snd_pcm_substream_chip(subs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	struct snd_pcm_runtime *runtime = subs->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	u16 val, nval, aval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (chip->chip_status & PDAUDIOCF_STAT_IS_STALE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	chip->pcm_channels = runtime->channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	chip->pcm_little = snd_pcm_format_little_endian(runtime->format) > 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #ifdef SNDRV_LITTLE_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	chip->pcm_swab = snd_pcm_format_big_endian(runtime->format) > 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	chip->pcm_swab = chip->pcm_little;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	if (snd_pcm_format_unsigned(runtime->format))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		chip->pcm_xor = 0x80008000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	if (pdacf_pcm_clear_sram(chip) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	val = nval = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	nval &= ~(PDAUDIOCF_DATAFMT0|PDAUDIOCF_DATAFMT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	switch (runtime->format) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	case SNDRV_PCM_FORMAT_S16_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	case SNDRV_PCM_FORMAT_S16_BE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	default: /* 24-bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		nval |= PDAUDIOCF_DATAFMT0 | PDAUDIOCF_DATAFMT1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	aval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	chip->pcm_sample = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	switch (runtime->format) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	case SNDRV_PCM_FORMAT_S16_LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	case SNDRV_PCM_FORMAT_S16_BE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		aval = AK4117_DIF_16R;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		chip->pcm_frame = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		chip->pcm_sample = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	case SNDRV_PCM_FORMAT_S24_3LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	case SNDRV_PCM_FORMAT_S24_3BE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		chip->pcm_sample = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	default: /* 24-bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		aval = AK4117_DIF_24R;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		chip->pcm_frame = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		chip->pcm_xor &= 0xffff0000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	if (val != nval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		snd_ak4117_reg_write(chip->ak4117, AK4117_REG_IO, AK4117_DIF2|AK4117_DIF1|AK4117_DIF0, aval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, nval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	val = pdacf_reg_read(chip,  PDAUDIOCF_REG_IER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	val &= ~(PDAUDIOCF_IRQLVLEN1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	val |= PDAUDIOCF_IRQLVLEN0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	pdacf_reg_write(chip, PDAUDIOCF_REG_IER, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	chip->pcm_size = runtime->buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	chip->pcm_period = runtime->period_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	chip->pcm_area = runtime->dma_area;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)  * capture hw information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static const struct snd_pcm_hardware pdacf_pcm_capture_hw = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 				 SNDRV_PCM_INFO_MMAP_VALID |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 				 SNDRV_PCM_INFO_BATCH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	.formats =		SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 				SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 				SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.rates =		SNDRV_PCM_RATE_32000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 				SNDRV_PCM_RATE_44100 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 				SNDRV_PCM_RATE_48000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 				SNDRV_PCM_RATE_88200 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 				SNDRV_PCM_RATE_96000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 				SNDRV_PCM_RATE_176400 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 				SNDRV_PCM_RATE_192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	.rate_min =		32000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	.rate_max =		192000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	.channels_min =		1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	.channels_max =		2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	.buffer_bytes_max =	(512*1024),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	.period_bytes_min =	8*1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	.period_bytes_max =	(64*1024),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.periods_min =		2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	.periods_max =		128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	.fifo_size =		0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)  * pdacf_pcm_capture_open - open callback for capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static int pdacf_pcm_capture_open(struct snd_pcm_substream *subs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	struct snd_pcm_runtime *runtime = subs->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	struct snd_pdacf *chip = snd_pcm_substream_chip(subs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	if (chip->chip_status & PDAUDIOCF_STAT_IS_STALE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	runtime->hw = pdacf_pcm_capture_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	runtime->private_data = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	chip->pcm_substream = subs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)  * pdacf_pcm_capture_close - close callback for capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int pdacf_pcm_capture_close(struct snd_pcm_substream *subs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	struct snd_pdacf *chip = snd_pcm_substream_chip(subs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (!chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	pdacf_reinit(chip, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	chip->pcm_substream = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)  * pdacf_pcm_capture_pointer - pointer callback for capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static snd_pcm_uframes_t pdacf_pcm_capture_pointer(struct snd_pcm_substream *subs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	struct snd_pdacf *chip = snd_pcm_substream_chip(subs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	return chip->pcm_hwptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)  * operators for PCM capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static const struct snd_pcm_ops pdacf_pcm_capture_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	.open =		pdacf_pcm_capture_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	.close =	pdacf_pcm_capture_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	.prepare =	pdacf_pcm_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	.trigger =	pdacf_pcm_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	.pointer =	pdacf_pcm_capture_pointer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)  * snd_pdacf_pcm_new - create and initialize a pcm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) int snd_pdacf_pcm_new(struct snd_pdacf *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	struct snd_pcm *pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	err = snd_pcm_new(chip->card, "PDAudioCF", 0, 0, 1, &pcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &pdacf_pcm_capture_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_VMALLOC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 				       snd_dma_continuous_data(GFP_KERNEL | GFP_DMA32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 				       0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	pcm->private_data = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	pcm->info_flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	pcm->nonatomic = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	strcpy(pcm->name, chip->card->shortname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	chip->pcm = pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	err = snd_ak4117_build(chip->ak4117, pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }