^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for Digigram pcxhr compatible soundcards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * low level interface with interrupt ans message handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2004 by Digigram <alsa@digigram.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __SOUND_PCXHR_MIX22_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __SOUND_PCXHR_MIX22_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) struct pcxhr_mgr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) int hr222_sub_init(struct pcxhr_mgr *mgr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) int hr222_sub_set_clock(struct pcxhr_mgr *mgr, unsigned int rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) int *changed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) int hr222_get_external_clock(struct pcxhr_mgr *mgr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) enum pcxhr_clock_type clock_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) int *sample_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int hr222_read_gpio(struct pcxhr_mgr *mgr, int is_gpi, int *value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) int hr222_write_gpo(struct pcxhr_mgr *mgr, int value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) int hr222_manage_timecode(struct pcxhr_mgr *mgr, int enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define HR222_LINE_PLAYBACK_LEVEL_MIN 0 /* -25.5 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define HR222_LINE_PLAYBACK_ZERO_LEVEL 51 /* 0.0 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define HR222_LINE_PLAYBACK_LEVEL_MAX 99 /* +24.0 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define HR222_LINE_CAPTURE_LEVEL_MIN 0 /* -111.5 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define HR222_LINE_CAPTURE_ZERO_LEVEL 223 /* 0.0 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define HR222_LINE_CAPTURE_LEVEL_MAX 255 /* +16 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define HR222_MICRO_CAPTURE_LEVEL_MIN 0 /* -98.5 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define HR222_MICRO_CAPTURE_LEVEL_MAX 210 /* +6.5 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int hr222_update_analog_audio_level(struct snd_pcxhr *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int is_capture,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) int channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int hr222_set_audio_source(struct snd_pcxhr *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int hr222_iec958_capture_byte(struct snd_pcxhr *chip, int aes_idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) unsigned char *aes_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int hr222_iec958_update_byte(struct snd_pcxhr *chip, int aes_idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned char aes_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) int hr222_add_mic_controls(struct snd_pcxhr *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #endif /* __SOUND_PCXHR_MIX22_H */