Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Driver for Digigram pcxhr soundcards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * main header file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (c) 2004 by Digigram <alsa@digigram.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #ifndef __SOUND_PCXHR_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #define __SOUND_PCXHR_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define PCXHR_DRIVER_VERSION		0x000906	/* 0.9.6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define PCXHR_DRIVER_VERSION_STRING	"0.9.6"		/* 0.9.6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define PCXHR_MAX_CARDS		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define PCXHR_PLAYBACK_STREAMS	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define PCXHR_GRANULARITY	96	/* min 96 and multiple of 48 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /* transfer granularity of pipes and the dsp time (MBOX4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define PCXHR_GRANULARITY_MIN	96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) /* TODO : granularity could be 64 or 128 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define PCXHR_GRANULARITY_HR22	192	/* granularity for stereo cards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) struct snd_pcxhr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) struct pcxhr_mgr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) struct pcxhr_stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) struct pcxhr_pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) enum pcxhr_clock_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	PCXHR_CLOCK_TYPE_INTERNAL = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	PCXHR_CLOCK_TYPE_WORD_CLOCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	PCXHR_CLOCK_TYPE_AES_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	PCXHR_CLOCK_TYPE_AES_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	PCXHR_CLOCK_TYPE_AES_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	PCXHR_CLOCK_TYPE_AES_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	PCXHR_CLOCK_TYPE_AES_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	PCXHR_CLOCK_TYPE_MAX = PCXHR_CLOCK_TYPE_AES_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	HR22_CLOCK_TYPE_INTERNAL = PCXHR_CLOCK_TYPE_INTERNAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	HR22_CLOCK_TYPE_AES_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	HR22_CLOCK_TYPE_AES_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	HR22_CLOCK_TYPE_MAX = HR22_CLOCK_TYPE_AES_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) struct pcxhr_mgr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	unsigned int num_cards;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct snd_pcxhr *chip[PCXHR_MAX_CARDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	struct pci_dev *pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	int granularity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	/* card access with 1 mem bar and 2 io bar's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	unsigned long port[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	/* share the name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	char name[40];			/* name of this soundcard */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct pcxhr_rmh *prmh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct mutex lock;		/* interrupt lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	struct mutex msg_lock;		/* message lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	struct mutex setup_mutex;	/* mutex used in hw_params, open and close */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	struct mutex mixer_mutex;	/* mutex for mixer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	/* hardware interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	unsigned int dsp_loaded;	/* bit flags of loaded dsp indices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	unsigned int dsp_version;	/* read from embedded once firmware is loaded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	int playback_chips;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	int capture_chips;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	int fw_file_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	int firmware_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	unsigned int is_hr_stereo:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	unsigned int board_has_aes1:1;	/* if 1 board has AES1 plug and SRC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	unsigned int board_has_analog:1; /* if 0 the board is digital only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	unsigned int board_has_mic:1; /* if 1 the board has microphone input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	unsigned int board_aes_in_192k:1;/* if 1 the aes input plugs do support 192kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	unsigned int mono_capture:1; /* if 1 the board does mono capture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	unsigned int capture_ltc:1; /* if 1 the board captures LTC input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	struct snd_dma_buffer hostport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	enum pcxhr_clock_type use_clock_type;	/* clock type selected by mixer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	enum pcxhr_clock_type cur_clock_type;	/* current clock type synced */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	int sample_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	int ref_count_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	int timer_toggle;		/* timer interrupt toggles between the two values 0x200 and 0x300 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	int dsp_time_last;		/* the last dsp time (read by interrupt) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	int dsp_time_err;		/* dsp time errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	unsigned int src_it_dsp;	/* dsp interrupt source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	unsigned int io_num_reg_cont;	/* backup of IO_NUM_REG_CONT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	unsigned int codec_speed;	/* speed mode of the codecs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	unsigned int sample_rate_real;	/* current real sample rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	int last_reg_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	int async_err_stream_xrun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	int async_err_pipe_xrun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	int async_err_other_last;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	unsigned char xlx_cfg;		/* copy of PCXHR_XLX_CFG register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	unsigned char xlx_selmic;	/* copy of PCXHR_XLX_SELMIC register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	unsigned char dsp_reset;	/* copy of PCXHR_DSP_RESET register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) enum pcxhr_stream_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	PCXHR_STREAM_STATUS_FREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	PCXHR_STREAM_STATUS_OPEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	PCXHR_STREAM_STATUS_SCHEDULE_RUN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	PCXHR_STREAM_STATUS_STARTED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	PCXHR_STREAM_STATUS_RUNNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	PCXHR_STREAM_STATUS_SCHEDULE_STOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	PCXHR_STREAM_STATUS_STOPPED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	PCXHR_STREAM_STATUS_PAUSED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct pcxhr_stream {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct snd_pcm_substream *substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	snd_pcm_format_t format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	struct pcxhr_pipe *pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	enum pcxhr_stream_status status;	/* free, open, running, draining, pause */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	u_int64_t timer_abs_periods;	/* timer: samples elapsed since TRIGGER_START (multiple of period_size) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	u_int32_t timer_period_frag;	/* timer: samples elapsed since last call to snd_pcm_period_elapsed (0..period_size) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	u_int32_t timer_buf_periods;	/* nb of periods in the buffer that have already elapsed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	int timer_is_synced;		/* if(0) : timer needs to be resynced with real hardware pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	int channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) enum pcxhr_pipe_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	PCXHR_PIPE_UNDEFINED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	PCXHR_PIPE_DEFINED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct pcxhr_pipe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	enum pcxhr_pipe_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	int is_capture;		/* this is a capture pipe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	int first_audio;	/* first audio num */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct snd_pcxhr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct pcxhr_mgr *mgr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	int chip_idx;		/* zero based */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	struct snd_pcm *pcm;		/* PCM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	struct pcxhr_pipe playback_pipe;	/* 1 stereo pipe only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	struct pcxhr_pipe capture_pipe[2];	/* 1 stereo or 2 mono pipes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	struct pcxhr_stream playback_stream[PCXHR_PLAYBACK_STREAMS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	struct pcxhr_stream capture_stream[2];	/* 1 stereo or 2 mono streams */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	int nb_streams_play;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	int nb_streams_capt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	int analog_playback_active[2];	/* Mixer : Master Playback !mute */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	int analog_playback_volume[2];	/* Mixer : Master Playback Volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	int analog_capture_volume[2];	/* Mixer : Master Capture Volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	int digital_playback_active[PCXHR_PLAYBACK_STREAMS][2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	int digital_playback_volume[PCXHR_PLAYBACK_STREAMS][2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	int digital_capture_volume[2];	/* Mixer : Digital Capture Volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	int monitoring_active[2];	/* Mixer : Monitoring Active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	int monitoring_volume[2];	/* Mixer : Monitoring Volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	int audio_capture_source;	/* Mixer : Audio Capture Source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	int mic_volume;			/* used by cards with MIC only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	int mic_boost;			/* used by cards with MIC only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	int mic_active;			/* used by cards with MIC only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	int analog_capture_active;	/* used by cards with MIC only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	int phantom_power;		/* used by cards with MIC only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	unsigned char aes_bits[5];	/* Mixer : IEC958_AES bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct pcxhr_hostport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	char purgebuffer[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	char reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* exported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int pcxhr_create_pcm(struct snd_pcxhr *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) int pcxhr_get_external_clock(struct pcxhr_mgr *mgr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 			     enum pcxhr_clock_type clock_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			     int *sample_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #endif /* __SOUND_PCXHR_H */