^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef WM8785_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define WM8785_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #define WM8785_R0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define WM8785_R1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define WM8785_R2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define WM8785_R7 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* R0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define WM8785_MCR_MASK 0x007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define WM8785_MCR_SLAVE 0x000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define WM8785_MCR_MASTER_128 0x001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define WM8785_MCR_MASTER_192 0x002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define WM8785_MCR_MASTER_256 0x003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define WM8785_MCR_MASTER_384 0x004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define WM8785_MCR_MASTER_512 0x005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define WM8785_MCR_MASTER_768 0x006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define WM8785_OSR_MASK 0x018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define WM8785_OSR_SINGLE 0x000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define WM8785_OSR_DOUBLE 0x008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define WM8785_OSR_QUAD 0x010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define WM8785_FORMAT_MASK 0x060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define WM8785_FORMAT_RJUST 0x000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define WM8785_FORMAT_LJUST 0x020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define WM8785_FORMAT_I2S 0x040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define WM8785_FORMAT_DSP 0x060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* R1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define WM8785_WL_MASK 0x003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define WM8785_WL_16 0x000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define WM8785_WL_20 0x001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define WM8785_WL_24 0x002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define WM8785_WL_32 0x003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define WM8785_LRP 0x004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define WM8785_BCLKINV 0x008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define WM8785_LRSWAP 0x010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define WM8785_DEVNO_MASK 0x0e0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* R2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define WM8785_HPFR 0x001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define WM8785_HPFL 0x002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define WM8785_SDODIS 0x004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define WM8785_PWRDNR 0x008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define WM8785_PWRDNL 0x010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define WM8785_TDM_MASK 0x1c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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