Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #ifndef OXYGEN_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #define OXYGEN_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include "oxygen_regs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) /* 1 << PCM_x == OXYGEN_CHANNEL_x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define PCM_A		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define PCM_B		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define PCM_C		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define PCM_SPDIF	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define PCM_MULTICH	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define PCM_AC97	5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define PCM_COUNT	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define OXYGEN_MCLKS(f_single, f_double, f_quad) ((MCLK_##f_single << 0) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 						  (MCLK_##f_double << 2) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 						  (MCLK_##f_quad   << 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define OXYGEN_IO_SIZE	0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define OXYGEN_EEPROM_ID	0x434d	/* "CM" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) /* model-specific configuration of outputs/inputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define PLAYBACK_0_TO_I2S	0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)      /* PLAYBACK_0_TO_AC97_0		not implemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define PLAYBACK_1_TO_SPDIF	0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define PLAYBACK_2_TO_AC97_1	0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define CAPTURE_0_FROM_I2S_1	0x0010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define CAPTURE_0_FROM_I2S_2	0x0020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)      /* CAPTURE_0_FROM_AC97_0		not implemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define CAPTURE_1_FROM_SPDIF	0x0080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define CAPTURE_2_FROM_I2S_2	0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define CAPTURE_2_FROM_AC97_1	0x0200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define CAPTURE_3_FROM_I2S_3	0x0400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define MIDI_OUTPUT		0x0800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define MIDI_INPUT		0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define AC97_CD_INPUT		0x2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define AC97_FMIC_SWITCH	0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	CONTROL_SPDIF_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	CONTROL_SPDIF_INPUT_BITS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	CONTROL_MIC_CAPTURE_SWITCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	CONTROL_LINE_CAPTURE_SWITCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	CONTROL_CD_CAPTURE_SWITCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	CONTROL_AUX_CAPTURE_SWITCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	CONTROL_COUNT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define OXYGEN_PCI_SUBID(sv, sd) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	.vendor = PCI_VENDOR_ID_CMEDIA, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	.device = 0x8788, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	.subvendor = sv, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	.subdevice = sd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define BROKEN_EEPROM_DRIVER_DATA ((unsigned long)-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define OXYGEN_PCI_SUBID_BROKEN_EEPROM \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	OXYGEN_PCI_SUBID(PCI_VENDOR_ID_CMEDIA, 0x8788), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	.driver_data = BROKEN_EEPROM_DRIVER_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) struct pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) struct pci_device_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) struct snd_card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) struct snd_pcm_substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) struct snd_pcm_hardware;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) struct snd_pcm_hw_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) struct snd_kcontrol_new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) struct snd_rawmidi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) struct snd_info_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) struct oxygen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) struct oxygen_model {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	const char *shortname;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	const char *longname;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	const char *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	void (*init)(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	int (*control_filter)(struct snd_kcontrol_new *template);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	int (*mixer_init)(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	void (*cleanup)(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	void (*suspend)(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	void (*resume)(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	void (*pcm_hardware_filter)(unsigned int channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 				    struct snd_pcm_hardware *hardware);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	void (*set_dac_params)(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			       struct snd_pcm_hw_params *params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	void (*set_adc_params)(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 			       struct snd_pcm_hw_params *params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	void (*update_dac_volume)(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	void (*update_dac_mute)(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	void (*update_center_lfe_mix)(struct oxygen *chip, bool mixed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	unsigned int (*adjust_dac_routing)(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 					   unsigned int play_routing);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	void (*gpio_changed)(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	void (*uart_input)(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	void (*ac97_switch)(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			    unsigned int reg, unsigned int mute);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	void (*dump_registers)(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			       struct snd_info_buffer *buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	const unsigned int *dac_tlv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	size_t model_data_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	unsigned int device_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	u8 dac_channels_pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	u8 dac_channels_mixer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	u8 dac_volume_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	u8 dac_volume_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	u8 misc_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	u8 function_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	u8 dac_mclks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	u8 adc_mclks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	u16 dac_i2s_format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	u16 adc_i2s_format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct oxygen {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	unsigned long addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	spinlock_t reg_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	struct mutex mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	struct pci_dev *pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct snd_rawmidi *midi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	void *model_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	unsigned int interrupt_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	u8 dac_volume[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	u8 dac_mute;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	u8 pcm_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	u8 pcm_running;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	u8 dac_routing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	u8 spdif_playback_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	u8 has_ac97_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	u8 has_ac97_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	u32 spdif_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	u32 spdif_pcm_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	struct snd_pcm_substream *streams[PCM_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	struct snd_kcontrol *controls[CONTROL_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	struct work_struct spdif_input_bits_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	struct work_struct gpio_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	wait_queue_head_t ac97_waitqueue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		u8 _8[OXYGEN_IO_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		__le16 _16[OXYGEN_IO_SIZE / 2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		__le32 _32[OXYGEN_IO_SIZE / 4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	} saved_registers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	u16 saved_ac97_registers[2][0x40];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	unsigned int uart_input_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	u8 uart_input[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	struct oxygen_model model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* oxygen_lib.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) int oxygen_pci_probe(struct pci_dev *pci, int index, char *id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		     struct module *owner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		     const struct pci_device_id *ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		     int (*get_model)(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 				      const struct pci_device_id *id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 				     )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		    );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) void oxygen_pci_remove(struct pci_dev *pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) extern const struct dev_pm_ops oxygen_pci_pm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) void oxygen_pci_shutdown(struct pci_dev *pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* oxygen_mixer.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) int oxygen_mixer_init(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) void oxygen_update_dac_routing(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) void oxygen_update_spdif_source(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* oxygen_pcm.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) int oxygen_pcm_init(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* oxygen_io.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) u8 oxygen_read8(struct oxygen *chip, unsigned int reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) u16 oxygen_read16(struct oxygen *chip, unsigned int reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) u32 oxygen_read32(struct oxygen *chip, unsigned int reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) void oxygen_write8_masked(struct oxygen *chip, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 			  u8 value, u8 mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) void oxygen_write16_masked(struct oxygen *chip, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			   u16 value, u16 mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) void oxygen_write32_masked(struct oxygen *chip, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 			   u32 value, u32 mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) u16 oxygen_read_ac97(struct oxygen *chip, unsigned int codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		     unsigned int index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) void oxygen_write_ac97(struct oxygen *chip, unsigned int codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		       unsigned int index, u16 data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 			      unsigned int index, u16 data, u16 mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) void oxygen_reset_uart(struct oxygen *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) void oxygen_write_uart(struct oxygen *chip, u8 data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) u16 oxygen_read_eeprom(struct oxygen *chip, unsigned int index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) void oxygen_write_eeprom(struct oxygen *chip, unsigned int index, u16 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static inline void oxygen_set_bits8(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 				    unsigned int reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	oxygen_write8_masked(chip, reg, value, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static inline void oxygen_set_bits16(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 				     unsigned int reg, u16 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	oxygen_write16_masked(chip, reg, value, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static inline void oxygen_set_bits32(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 				     unsigned int reg, u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	oxygen_write32_masked(chip, reg, value, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static inline void oxygen_clear_bits8(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 				      unsigned int reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	oxygen_write8_masked(chip, reg, 0, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static inline void oxygen_clear_bits16(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 				       unsigned int reg, u16 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	oxygen_write16_masked(chip, reg, 0, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static inline void oxygen_clear_bits32(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 				       unsigned int reg, u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	oxygen_write32_masked(chip, reg, 0, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static inline void oxygen_ac97_set_bits(struct oxygen *chip, unsigned int codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 					unsigned int index, u16 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	oxygen_write_ac97_masked(chip, codec, index, value, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static inline void oxygen_ac97_clear_bits(struct oxygen *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 					  unsigned int codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 					  unsigned int index, u16 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	oxygen_write_ac97_masked(chip, codec, index, 0, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #endif