^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Support for Digigram Lola PCI-e boards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2011 Takashi Iwai <tiwai@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef _LOLA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define _LOLA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define DRVNAME "snd-lola"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define SFX DRVNAME ": "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Lola HD Audio Registers BAR0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define LOLA_BAR0_GCAP 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define LOLA_BAR0_VMIN 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define LOLA_BAR0_VMAJ 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define LOLA_BAR0_OUTPAY 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define LOLA_BAR0_INPAY 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define LOLA_BAR0_GCTL 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define LOLA_BAR0_WAKEEN 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define LOLA_BAR0_STATESTS 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define LOLA_BAR0_GSTS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define LOLA_BAR0_OUTSTRMPAY 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define LOLA_BAR0_INSTRMPAY 0x1a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define LOLA_BAR0_INTCTL 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define LOLA_BAR0_INTSTS 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define LOLA_BAR0_WALCLK 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define LOLA_BAR0_SSYNC 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define LOLA_BAR0_CORBLBASE 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define LOLA_BAR0_CORBUBASE 0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define LOLA_BAR0_CORBWP 0x48 /* no ULONG access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define LOLA_BAR0_CORBRP 0x4a /* no ULONG access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define LOLA_BAR0_CORBCTL 0x4c /* no ULONG access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define LOLA_BAR0_CORBSTS 0x4d /* UCHAR access only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define LOLA_BAR0_CORBSIZE 0x4e /* no ULONG access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define LOLA_BAR0_RIRBLBASE 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define LOLA_BAR0_RIRBUBASE 0x54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define LOLA_BAR0_RIRBWP 0x58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define LOLA_BAR0_RINTCNT 0x5a /* no ULONG access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define LOLA_BAR0_RIRBCTL 0x5c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define LOLA_BAR0_RIRBSTS 0x5d /* UCHAR access only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define LOLA_BAR0_RIRBSIZE 0x5e /* no ULONG access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define LOLA_BAR0_ICW 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define LOLA_BAR0_IRR 0x64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define LOLA_BAR0_ICS 0x68
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define LOLA_BAR0_DPLBASE 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define LOLA_BAR0_DPUBASE 0x74
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* stream register offsets from stream base 0x80 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define LOLA_BAR0_SD0_OFFSET 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define LOLA_REG0_SD_CTL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define LOLA_REG0_SD_STS 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define LOLA_REG0_SD_LPIB 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define LOLA_REG0_SD_CBL 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define LOLA_REG0_SD_LVI 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define LOLA_REG0_SD_FIFOW 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define LOLA_REG0_SD_FIFOSIZE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define LOLA_REG0_SD_FORMAT 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define LOLA_REG0_SD_BDLPL 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define LOLA_REG0_SD_BDLPU 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * Lola Digigram Registers BAR1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define LOLA_BAR1_FPGAVER 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define LOLA_BAR1_DEVER 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define LOLA_BAR1_UCBMV 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define LOLA_BAR1_JTAG 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define LOLA_BAR1_UARTRX 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define LOLA_BAR1_UARTTX 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define LOLA_BAR1_UARTCR 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define LOLA_BAR1_NVRAMVER 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define LOLA_BAR1_CTRLSPI 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define LOLA_BAR1_DSPI 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define LOLA_BAR1_AISPI 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define LOLA_BAR1_GRAN 0x2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define LOLA_BAR1_DINTCTL 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define LOLA_BAR1_DIINTCTL 0x84
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define LOLA_BAR1_DOINTCTL 0x88
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define LOLA_BAR1_LRC 0x90
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define LOLA_BAR1_DINTSTS 0x94
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define LOLA_BAR1_DIINTSTS 0x98
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define LOLA_BAR1_DOINTSTS 0x9c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define LOLA_BAR1_DSD0_OFFSET 0xa0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define LOLA_BAR1_DSD_SIZE 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define LOLA_BAR1_DSDnSTS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define LOLA_BAR1_DSDnLPIB 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define LOLA_BAR1_DSDnCTL 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define LOLA_BAR1_DSDnLVI 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define LOLA_BAR1_DSDnBDPL 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define LOLA_BAR1_DSDnBDPU 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define LOLA_BAR1_SSYNC 0x03e8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define LOLA_BAR1_BOARD_CTRL 0x0f00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define LOLA_BAR1_BOARD_MODE 0x0f02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define LOLA_BAR1_SOURCE_GAIN_ENABLE 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define LOLA_BAR1_DEST00_MIX_GAIN_ENABLE 0x1004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define LOLA_BAR1_DEST31_MIX_GAIN_ENABLE 0x1080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define LOLA_BAR1_SOURCE00_01_GAIN 0x1084
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define LOLA_BAR1_SOURCE30_31_GAIN 0x10c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define LOLA_BAR1_SOURCE_GAIN(src) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) (LOLA_BAR1_SOURCE00_01_GAIN + (src) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define LOLA_BAR1_DEST00_MIX00_01_GAIN 0x10c4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define LOLA_BAR1_DEST00_MIX30_31_GAIN 0x1100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define LOLA_BAR1_DEST01_MIX00_01_GAIN 0x1104
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define LOLA_BAR1_DEST01_MIX30_31_GAIN 0x1140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define LOLA_BAR1_DEST31_MIX00_01_GAIN 0x1884
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define LOLA_BAR1_DEST31_MIX30_31_GAIN 0x18c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define LOLA_BAR1_MIX_GAIN(dest, mix) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) (LOLA_BAR1_DEST00_MIX00_01_GAIN + (dest) * 0x40 + (mix) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define LOLA_BAR1_ANALOG_CLIP_IN 0x18c4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define LOLA_BAR1_PEAKMETERS_SOURCE00_01 0x18c8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define LOLA_BAR1_PEAKMETERS_SOURCE30_31 0x1904
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define LOLA_BAR1_PEAKMETERS_SOURCE(src) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) (LOLA_BAR1_PEAKMETERS_SOURCE00_01 + (src) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define LOLA_BAR1_PEAKMETERS_DEST00_01 0x1908
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define LOLA_BAR1_PEAKMETERS_DEST30_31 0x1944
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define LOLA_BAR1_PEAKMETERS_DEST(dest) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) (LOLA_BAR1_PEAKMETERS_DEST00_01 + (dest) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define LOLA_BAR1_PEAKMETERS_AGC00_01 0x1948
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define LOLA_BAR1_PEAKMETERS_AGC14_15 0x1964
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define LOLA_BAR1_PEAKMETERS_AGC(x) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) (LOLA_BAR1_PEAKMETERS_AGC00_01 + (x) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* GCTL reset bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define LOLA_GCTL_RESET (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* GCTL unsolicited response enable bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define LOLA_GCTL_UREN (1 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* CORB/RIRB control, read/write pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define LOLA_RBCTL_DMA_EN 0x02 /* enable DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define LOLA_RBCTL_IRQ_EN 0x01 /* enable IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define LOLA_RBRWP_CLR 0x8000 /* read/write pointer clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define LOLA_RIRB_EX_UNSOL_EV 0x40000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define LOLA_RIRB_EX_ERROR 0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* CORB int mask: CMEI[0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define LOLA_CORB_INT_CMEI 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define LOLA_CORB_INT_MASK LOLA_CORB_INT_CMEI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* RIRB int mask: overrun[2], response[0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define LOLA_RIRB_INT_RESPONSE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define LOLA_RIRB_INT_OVERRUN 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define LOLA_RIRB_INT_MASK (LOLA_RIRB_INT_RESPONSE | LOLA_RIRB_INT_OVERRUN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* DINTCTL and DINTSTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define LOLA_DINT_GLOBAL 0x80000000 /* global interrupt enable bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define LOLA_DINT_CTRL 0x40000000 /* controller interrupt enable bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define LOLA_DINT_FIFOERR 0x20000000 /* global fifo error enable bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define LOLA_DINT_MUERR 0x10000000 /* global microcontroller underrun error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* DSDnCTL bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define LOLA_DSD_CTL_SRST 0x01 /* stream reset bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define LOLA_DSD_CTL_SRUN 0x02 /* stream DMA start bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define LOLA_DSD_CTL_IOCE 0x04 /* interrupt on completion enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define LOLA_DSD_CTL_DEIE 0x10 /* descriptor error interrupt enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define LOLA_DSD_CTL_VLRCV 0x20 /* valid LRCountValue information in bits 8..31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define LOLA_LRC_MASK 0xffffff00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* DSDnSTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define LOLA_DSD_STS_BCIS 0x04 /* buffer completion interrupt status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define LOLA_DSD_STS_DESE 0x10 /* descriptor error interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define LOLA_DSD_STS_FIFORDY 0x20 /* fifo ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define LOLA_CORB_ENTRIES 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define MAX_STREAM_IN_COUNT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define MAX_STREAM_OUT_COUNT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define MAX_STREAM_COUNT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define MAX_PINS MAX_STREAM_COUNT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define MAX_STREAM_BUFFER_COUNT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define MAX_AUDIO_INOUT_COUNT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define LOLA_CLOCK_TYPE_INTERNAL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define LOLA_CLOCK_TYPE_AES 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define LOLA_CLOCK_TYPE_AES_SYNC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define LOLA_CLOCK_TYPE_WORDCLOCK 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define LOLA_CLOCK_TYPE_ETHERSOUND 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define LOLA_CLOCK_TYPE_VIDEO 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define LOLA_CLOCK_FORMAT_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define LOLA_CLOCK_FORMAT_NTSC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define LOLA_CLOCK_FORMAT_PAL 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define MAX_SAMPLE_CLOCK_COUNT 48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* parameters used with mixer widget's mixer capabilities */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define LOLA_PEAK_METER_CAN_AGC_MASK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define LOLA_PEAK_METER_CAN_ANALOG_CLIP_MASK 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct lola_bar {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) unsigned long addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) void __iomem *remap_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* CORB/RIRB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) struct lola_rb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) __le32 *buf; /* CORB/RIRB buffer, 8 byte per each entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) dma_addr_t addr; /* physical address of CORB/RIRB buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) unsigned short rp, wp; /* read/write pointers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) int cmds; /* number of pending requests */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* Pin widget setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) struct lola_pin {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) unsigned int nid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) bool is_analog;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) unsigned int amp_mute;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) unsigned int amp_step_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) unsigned int amp_num_steps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) unsigned int amp_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) unsigned int max_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) unsigned int config_default_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) unsigned int fixed_gain_list_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) unsigned int cur_gain_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct lola_pin_array {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) unsigned int num_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) unsigned int num_analog_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct lola_pin pins[MAX_PINS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* Clock widget setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct lola_sample_clock {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) unsigned int type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) unsigned int format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) unsigned int freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct lola_clock_widget {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) unsigned int nid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) unsigned int items;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) unsigned int cur_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) unsigned int cur_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) bool cur_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct lola_sample_clock sample_clock[MAX_SAMPLE_CLOCK_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) unsigned int idx_lookup[MAX_SAMPLE_CLOCK_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define LOLA_MIXER_DIM 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) struct lola_mixer_array {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) u32 src_gain_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) u32 dest_mix_gain_enable[LOLA_MIXER_DIM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) u16 src_gain[LOLA_MIXER_DIM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) u16 dest_mix_gain[LOLA_MIXER_DIM][LOLA_MIXER_DIM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* Mixer widget setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) struct lola_mixer_widget {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) unsigned int nid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) unsigned int caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) struct lola_mixer_array __iomem *array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct lola_mixer_array *array_saved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) unsigned int src_stream_outs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) unsigned int src_phys_ins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) unsigned int dest_stream_ins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) unsigned int dest_phys_outs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) unsigned int src_stream_out_ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) unsigned int dest_phys_out_ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) unsigned int src_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) unsigned int dest_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* Audio stream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct lola_stream {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) unsigned int nid; /* audio widget NID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) unsigned int index; /* array index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) unsigned int dsd; /* DSD index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) bool can_float;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) struct snd_pcm_substream *substream; /* assigned PCM substream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) struct lola_stream *master; /* master stream (for multi-channel) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* buffer setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) unsigned int bufsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) unsigned int period_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) unsigned int frags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* format + channel setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) unsigned int format_verb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) unsigned int opened:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) unsigned int prepared:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) unsigned int paused:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) unsigned int running:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #define PLAY SNDRV_PCM_STREAM_PLAYBACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define CAPT SNDRV_PCM_STREAM_CAPTURE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) struct lola_pcm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) unsigned int num_streams;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct snd_dma_buffer bdl; /* BDL buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct lola_stream streams[MAX_STREAM_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /* card instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) struct lola {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) struct pci_dev *pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* pci resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct lola_bar bar[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /* locks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) spinlock_t reg_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) struct mutex open_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* CORB/RIRB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct lola_rb corb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct lola_rb rirb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) unsigned int res, res_ex; /* last read values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) /* last command (for debugging) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) unsigned int last_cmd_nid, last_verb, last_data, last_extdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* CORB/RIRB buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) struct snd_dma_buffer rb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /* unsolicited events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) unsigned int last_unsol_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* streams */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) struct lola_pcm pcm[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /* input src */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) unsigned int input_src_caps_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) unsigned int input_src_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) struct lola_pin_array pin[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) /* clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) struct lola_clock_widget clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) int ref_count_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) unsigned int sample_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /* mixer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) struct lola_mixer_widget mixer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /* hw info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) unsigned int version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) unsigned int lola_caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) /* parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) unsigned int granularity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) unsigned int sample_rate_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) unsigned int sample_rate_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) unsigned int initialized:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) unsigned int cold_reset:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) unsigned int polling_mode:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /* for debugging */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) unsigned int debug_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) unsigned int debug_res_ex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #define BAR0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) #define BAR1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /* Helper macros */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) #define lola_readl(chip, idx, name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) readl((chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) #define lola_readw(chip, idx, name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) readw((chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #define lola_readb(chip, idx, name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) readb((chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) #define lola_writel(chip, idx, name, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) writel((val), (chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) #define lola_writew(chip, idx, name, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) writew((val), (chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #define lola_writeb(chip, idx, name, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) writeb((val), (chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #define lola_dsd_read(chip, dsd, name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) readl((chip)->bar[BAR1].remap_addr + LOLA_BAR1_DSD0_OFFSET + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) (LOLA_BAR1_DSD_SIZE * (dsd)) + LOLA_BAR1_DSDn##name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) #define lola_dsd_write(chip, dsd, name, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) writel((val), (chip)->bar[BAR1].remap_addr + LOLA_BAR1_DSD0_OFFSET + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) (LOLA_BAR1_DSD_SIZE * (dsd)) + LOLA_BAR1_DSDn##name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /* GET verbs HDAudio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) #define LOLA_VERB_GET_STREAM_FORMAT 0xa00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) #define LOLA_VERB_GET_AMP_GAIN_MUTE 0xb00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) #define LOLA_VERB_PARAMETERS 0xf00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) #define LOLA_VERB_GET_POWER_STATE 0xf05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) #define LOLA_VERB_GET_CONV 0xf06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) #define LOLA_VERB_GET_UNSOLICITED_RESPONSE 0xf08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) #define LOLA_VERB_GET_DIGI_CONVERT_1 0xf0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) #define LOLA_VERB_GET_CONFIG_DEFAULT 0xf1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) #define LOLA_VERB_GET_SUBSYSTEM_ID 0xf20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) /* GET verbs Digigram */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) #define LOLA_VERB_GET_FIXED_GAIN 0xfc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) #define LOLA_VERB_GET_GAIN_SELECT 0xfc1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) #define LOLA_VERB_GET_MAX_LEVEL 0xfc2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) #define LOLA_VERB_GET_CLOCK_LIST 0xfc3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) #define LOLA_VERB_GET_CLOCK_SELECT 0xfc4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) #define LOLA_VERB_GET_CLOCK_STATUS 0xfc5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) /* SET verbs HDAudio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) #define LOLA_VERB_SET_STREAM_FORMAT 0x200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) #define LOLA_VERB_SET_AMP_GAIN_MUTE 0x300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) #define LOLA_VERB_SET_POWER_STATE 0x705
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) #define LOLA_VERB_SET_CHANNEL_STREAMID 0x706
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) #define LOLA_VERB_SET_UNSOLICITED_ENABLE 0x708
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) #define LOLA_VERB_SET_DIGI_CONVERT_1 0x70d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) /* SET verbs Digigram */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) #define LOLA_VERB_SET_GAIN_SELECT 0xf81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) #define LOLA_VERB_SET_CLOCK_SELECT 0xf84
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) #define LOLA_VERB_SET_GRANULARITY_STEPS 0xf86
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) #define LOLA_VERB_SET_SOURCE_GAIN 0xf87
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #define LOLA_VERB_SET_MIX_GAIN 0xf88
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) #define LOLA_VERB_SET_DESTINATION_GAIN 0xf89
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) #define LOLA_VERB_SET_SRC 0xf8a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) /* Parameter IDs used with LOLA_VERB_PARAMETERS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) #define LOLA_PAR_VENDOR_ID 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) #define LOLA_PAR_FUNCTION_TYPE 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) #define LOLA_PAR_AUDIO_WIDGET_CAP 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) #define LOLA_PAR_PCM 0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) #define LOLA_PAR_STREAM_FORMATS 0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) #define LOLA_PAR_PIN_CAP 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #define LOLA_PAR_AMP_IN_CAP 0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) #define LOLA_PAR_CONNLIST_LEN 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) #define LOLA_PAR_POWER_STATE 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) #define LOLA_PAR_GPIO_CAP 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) #define LOLA_PAR_AMP_OUT_CAP 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) #define LOLA_PAR_SPECIFIC_CAPS 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) #define LOLA_PAR_FIXED_GAIN_LIST 0x81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /* extract results of LOLA_PAR_SPECIFIC_CAPS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #define LOLA_AFG_MIXER_WIDGET_PRESENT(res) ((res & (1 << 21)) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #define LOLA_AFG_CLOCK_WIDGET_PRESENT(res) ((res & (1 << 20)) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) #define LOLA_AFG_INPUT_PIN_COUNT(res) ((res >> 10) & 0x2ff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #define LOLA_AFG_OUTPUT_PIN_COUNT(res) ((res) & 0x2ff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) /* extract results of LOLA_PAR_AMP_IN_CAP / LOLA_PAR_AMP_OUT_CAP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #define LOLA_AMP_MUTE_CAPABLE(res) ((res & (1 << 31)) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) #define LOLA_AMP_STEP_SIZE(res) ((res >> 24) & 0x7f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) #define LOLA_AMP_NUM_STEPS(res) ((res >> 12) & 0x3ff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) #define LOLA_AMP_OFFSET(res) ((res) & 0x3ff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) #define LOLA_GRANULARITY_MIN 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) #define LOLA_GRANULARITY_MAX 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) #define LOLA_GRANULARITY_STEP 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) /* parameters used with unsolicited command/response */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) #define LOLA_UNSOLICITED_TAG_MASK 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) #define LOLA_UNSOLICITED_TAG 0x1a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) #define LOLA_UNSOLICITED_ENABLE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) #define LOLA_UNSOL_RESP_TAG_OFFSET 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) /* count values in the Vendor Specific Mixer Widget's Audio Widget Capabilities */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) #define LOLA_MIXER_SRC_INPUT_PLAY_SEPARATION(res) ((res >> 2) & 0x1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) #define LOLA_MIXER_DEST_REC_OUTPUT_SEPARATION(res) ((res >> 7) & 0x1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) int lola_codec_write(struct lola *chip, unsigned int nid, unsigned int verb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) unsigned int data, unsigned int extdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) int lola_codec_read(struct lola *chip, unsigned int nid, unsigned int verb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) unsigned int data, unsigned int extdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) unsigned int *val, unsigned int *extval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) int lola_codec_flush(struct lola *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) #define lola_read_param(chip, nid, param, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) lola_codec_read(chip, nid, LOLA_VERB_PARAMETERS, param, 0, val, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* PCM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) int lola_create_pcm(struct lola *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) void lola_free_pcm(struct lola *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) int lola_init_pcm(struct lola *chip, int dir, int *nidp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) void lola_pcm_update(struct lola *chip, struct lola_pcm *pcm, unsigned int bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) /* clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) int lola_init_clock_widget(struct lola *chip, int nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) int lola_set_granularity(struct lola *chip, unsigned int val, bool force);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) int lola_enable_clock_events(struct lola *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) int lola_set_clock_index(struct lola *chip, unsigned int idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) int lola_set_clock(struct lola *chip, int idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) int lola_set_sample_rate(struct lola *chip, int rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) bool lola_update_ext_clock_freq(struct lola *chip, unsigned int val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) unsigned int lola_sample_rate_convert(unsigned int coded);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) /* mixer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) int lola_init_pins(struct lola *chip, int dir, int *nidp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) int lola_init_mixer_widget(struct lola *chip, int nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) void lola_free_mixer(struct lola *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) int lola_create_mixer(struct lola *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) int lola_setup_all_analog_gains(struct lola *chip, int dir, bool mute);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) void lola_save_mixer(struct lola *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) void lola_restore_mixer(struct lola *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) int lola_set_src_config(struct lola *chip, unsigned int src_mask, bool update);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) /* proc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) #ifdef CONFIG_SND_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) void lola_proc_debug_new(struct lola *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) #define lola_proc_debug_new(chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) #endif /* _LOLA_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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