^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ALSA driver for ICEnsemble ICE1712 (Envy24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Lowlevel functions for Hoontech STDSP24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "ice1712.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "hoontech.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* Hoontech-specific setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct hoontech_spec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned char boxbits[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned int config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) unsigned short boxconfig[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static void snd_ice1712_stdsp24_gpio_write(struct snd_ice1712 *ice, unsigned char byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) byte |= ICE1712_STDSP24_CLOCK_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) byte &= ~ICE1712_STDSP24_CLOCK_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) byte |= ICE1712_STDSP24_CLOCK_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static void snd_ice1712_stdsp24_darear(struct snd_ice1712 *ice, int activate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct hoontech_spec *spec = ice->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) mutex_lock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) ICE1712_STDSP24_0_DAREAR(spec->boxbits, activate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) mutex_unlock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static void snd_ice1712_stdsp24_mute(struct snd_ice1712 *ice, int activate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct hoontech_spec *spec = ice->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) mutex_lock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) ICE1712_STDSP24_3_MUTE(spec->boxbits, activate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) mutex_unlock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static void snd_ice1712_stdsp24_insel(struct snd_ice1712 *ice, int activate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct hoontech_spec *spec = ice->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) mutex_lock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) ICE1712_STDSP24_3_INSEL(spec->boxbits, activate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) mutex_unlock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static void snd_ice1712_stdsp24_box_channel(struct snd_ice1712 *ice, int box, int chn, int activate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct hoontech_spec *spec = ice->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) mutex_lock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* select box */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ICE1712_STDSP24_0_BOX(spec->boxbits, box);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* prepare for write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (chn == 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ICE1712_STDSP24_2_MIDI1(spec->boxbits, activate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (chn == 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) switch (chn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case 0: ICE1712_STDSP24_1_CHN1(spec->boxbits, 0); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) case 1: ICE1712_STDSP24_1_CHN2(spec->boxbits, 0); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) case 2: ICE1712_STDSP24_1_CHN3(spec->boxbits, 0); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) mutex_unlock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static void snd_ice1712_stdsp24_box_midi(struct snd_ice1712 *ice, int box, int master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct hoontech_spec *spec = ice->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) mutex_lock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /* select box */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ICE1712_STDSP24_0_BOX(spec->boxbits, box);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ICE1712_STDSP24_2_MIDI1(spec->boxbits, master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) mdelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) mutex_unlock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static void snd_ice1712_stdsp24_midi2(struct snd_ice1712 *ice, int activate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct hoontech_spec *spec = ice->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) mutex_lock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) ICE1712_STDSP24_3_MIDI2(spec->boxbits, activate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) mutex_unlock(&ice->gpio_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int hoontech_init(struct snd_ice1712 *ice, bool staudio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct hoontech_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int box, chn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ice->num_total_dacs = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ice->num_total_adcs = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) spec = kzalloc(sizeof(*spec), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (!spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) ice->spec = spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) ICE1712_STDSP24_SET_ADDR(spec->boxbits, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ICE1712_STDSP24_CLOCK(spec->boxbits, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ICE1712_STDSP24_0_BOX(spec->boxbits, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ICE1712_STDSP24_0_DAREAR(spec->boxbits, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) ICE1712_STDSP24_SET_ADDR(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) ICE1712_STDSP24_CLOCK(spec->boxbits, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) ICE1712_STDSP24_SET_ADDR(spec->boxbits, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ICE1712_STDSP24_CLOCK(spec->boxbits, 2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) ICE1712_STDSP24_SET_ADDR(spec->boxbits, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) ICE1712_STDSP24_CLOCK(spec->boxbits, 3, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) ICE1712_STDSP24_3_MIDI2(spec->boxbits, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) ICE1712_STDSP24_3_MUTE(spec->boxbits, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) ICE1712_STDSP24_3_INSEL(spec->boxbits, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /* let's go - activate only functions in first box */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (staudio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) spec->config = ICE1712_STDSP24_MUTE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) spec->config = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* ICE1712_STDSP24_MUTE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) ICE1712_STDSP24_INSEL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ICE1712_STDSP24_DAREAR; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* These boxconfigs have caused problems in the past.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * The code is not optimal, but should now enable a working config to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * be achieved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * ** MIDI IN can only be configured on one box **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * ICE1712_STDSP24_BOX_MIDI1 needs to be set for that box.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * Tests on a ADAC2000 box suggest the box config flags do not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * work as would be expected, and the inputs are crossed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * Setting ICE1712_STDSP24_BOX_MIDI1 and ICE1712_STDSP24_BOX_MIDI2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * on the same box connects MIDI-In to both 401 uarts; both outputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * are then active on all boxes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * The default config here sets up everything on the first box.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * Alan Horstmann 5.2.2008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) spec->boxconfig[0] = ICE1712_STDSP24_BOX_CHN1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ICE1712_STDSP24_BOX_CHN2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ICE1712_STDSP24_BOX_CHN3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ICE1712_STDSP24_BOX_CHN4 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) ICE1712_STDSP24_BOX_MIDI1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ICE1712_STDSP24_BOX_MIDI2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (staudio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) spec->boxconfig[1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) spec->boxconfig[2] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) spec->boxconfig[3] = spec->boxconfig[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) spec->boxconfig[1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) spec->boxconfig[2] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) spec->boxconfig[3] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) snd_ice1712_stdsp24_darear(ice,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) (spec->config & ICE1712_STDSP24_DAREAR) ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) snd_ice1712_stdsp24_mute(ice,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) (spec->config & ICE1712_STDSP24_MUTE) ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) snd_ice1712_stdsp24_insel(ice,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) (spec->config & ICE1712_STDSP24_INSEL) ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) for (box = 0; box < 4; box++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) snd_ice1712_stdsp24_midi2(ice, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) for (chn = 0; chn < 4; chn++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) snd_ice1712_stdsp24_box_channel(ice, box, chn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) (spec->boxconfig[box] & (1 << chn)) ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) snd_ice1712_stdsp24_box_midi(ice, box, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static int snd_ice1712_hoontech_init(struct snd_ice1712 *ice)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return hoontech_init(ice, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static int snd_ice1712_staudio_init(struct snd_ice1712 *ice)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return hoontech_init(ice, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * AK4524 access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* start callback for STDSP24 with modified hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static void stdsp24_ak4524_lock(struct snd_akm4xxx *ak, int chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct snd_ice1712 *ice = ak->private_data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) unsigned char tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) snd_ice1712_save_gpio_status(ice);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) tmp = ICE1712_STDSP24_SERIAL_DATA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) ICE1712_STDSP24_SERIAL_CLOCK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) ICE1712_STDSP24_AK4524_CS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ice->gpio.direction | tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static int snd_ice1712_value_init(struct snd_ice1712 *ice)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* Hoontech STDSP24 with modified hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static const struct snd_akm4xxx akm_stdsp24_mv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .num_adcs = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .num_dacs = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .type = SND_AK4524,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .lock = stdsp24_ak4524_lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static const struct snd_ak4xxx_private akm_stdsp24_mv_priv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .caddr = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .cif = 1, /* CIF high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .data_mask = ICE1712_STDSP24_SERIAL_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .clk_mask = ICE1712_STDSP24_SERIAL_CLOCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .cs_mask = ICE1712_STDSP24_AK4524_CS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .cs_addr = ICE1712_STDSP24_AK4524_CS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .cs_none = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .add_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct snd_akm4xxx *ak;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /* set the analog DACs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) ice->num_total_dacs = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /* set the analog ADCs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) ice->num_total_adcs = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /* analog section */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if (! ak)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) ice->akm_codecs = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) err = snd_ice1712_akm4xxx_init(ak, &akm_stdsp24_mv, &akm_stdsp24_mv_priv, ice);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) /* ak4524 controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return snd_ice1712_akm4xxx_build_controls(ice);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static int snd_ice1712_ez8_init(struct snd_ice1712 *ice)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) ice->gpio.write_mask = ice->eeprom.gpiomask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) ice->gpio.direction = ice->eeprom.gpiodir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ice->eeprom.gpiomask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->eeprom.gpiodir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ice->eeprom.gpiostate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) /* entry point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) struct snd_ice1712_card_info snd_ice1712_hoontech_cards[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .subvendor = ICE1712_SUBDEVICE_STDSP24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .name = "Hoontech SoundTrack Audio DSP24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .model = "dsp24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .chip_init = snd_ice1712_hoontech_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .mpu401_1_name = "MIDI-1 Hoontech/STA DSP24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .mpu401_2_name = "MIDI-2 Hoontech/STA DSP24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .subvendor = ICE1712_SUBDEVICE_STDSP24_VALUE, /* a dummy id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .name = "Hoontech SoundTrack Audio DSP24 Value",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .model = "dsp24_value",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .chip_init = snd_ice1712_value_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .subvendor = ICE1712_SUBDEVICE_STDSP24_MEDIA7_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .name = "Hoontech STA DSP24 Media 7.1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .model = "dsp24_71",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .chip_init = snd_ice1712_hoontech_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .subvendor = ICE1712_SUBDEVICE_EVENT_EZ8, /* a dummy id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .name = "Event Electronics EZ8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .model = "ez8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .chip_init = snd_ice1712_ez8_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /* STAudio ADCIII has the same SSID as Hoontech StA DSP24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * thus identified only via the explicit model option
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .subvendor = ICE1712_SUBDEVICE_STAUDIO_ADCIII, /* a dummy id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .name = "STAudio ADCIII",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .model = "staudio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .chip_init = snd_ice1712_staudio_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) { } /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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